Double-Gate TFT Sub-Pixel Layout for Low-Leakage Display Panels
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Solution Overview
Problem
Current display technologies face challenges in achieving efficient power management and stability in half-transmission half-reflection display panels, particularly in managing ON-state and OFF-state currents of transistors, which affects power consumption and display performance.
Innovation Solution
The display panel incorporates a configuration of first, second, and third transistors, along with specific electrode connections and gate line arrangements, allowing for double-gate thin film transistor (TFT) operation to control signal circulation, thereby increasing ON-state currents, reducing OFF-state currents, and improving stability. Additionally, the panel employs a reflecting electrode and through holes for light transmission and reflection modes to optimize power usage.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Power
If conventional single-gate transistor configuration is used in half-transmission half-reflection display panel, then device complexity is low, but ON-state current is insufficient and OFF-state current leakage is high
Solution Approach 1:
The patent combines two gate electrodes (first gate electrode and second gate electrode) to form a double-gate transistor structure. The first gate electrode is connected to a first gate line and the second gate electrode is connected to a second gate line, allowing independent control of both gates to achieve superior current control compared to conventional single-gate transistors.
Solution Approach 2:
The transistor gate is segmented into two separate gate electrodes that can be independently controlled. This segmentation allows the first gate to control the primary current flow while the second gate provides additional control capability, enabling better modulation of ON-state current and suppression of OFF-state leakage.
2Loss of energy
If conventional transistor configuration is used, then manufacturing process is simple, but power consumption cannot be effectively managed
Solution Approach 1:
The double-gate transistor structure merges two gate control mechanisms into a single transistor device, enabling sophisticated power management through coordinated control of both gates. This allows the display panel to effectively manage power consumption by controlling current flow more precisely without requiring separate transistor circuits.
Solution Approach 2:
The patent changes the control parameters of the transistor by introducing a second gate that can be independently controlled. This allows dynamic adjustment of the transistor's electrical characteristics, enabling effective power consumption management through voltage control on both gates while maintaining compatibility with existing thin-film transistor manufacturing processes.
3Reliability
If dual-gate transistor configuration is implemented, then current control and stability are improved, but device complexity increases
Solution Approach 1:
The patent merges two gate control systems into a unified double-gate transistor structure that works synergistically. The first gate electrode and second gate electrode together provide enhanced stability and reliability for display operation, with both gates contributing to consistent current control across different operating conditions.
Solution Approach 2:
The double-gate transistor structure provides multi-functional capability within a single device. It can operate in different modes by adjusting the voltage on the first and second gates independently, enabling both high-current ON-state operation and low-leakage OFF-state operation, thereby improving overall display stability and reliability.
4Measurement precision
If simple gate line arrangement is used, then routing is simple, but current control precision is insufficient
Solution Approach 1:
The gate control is segmented into two independent gate lines (first gate line and second gate line) that can be controlled separately. This segmentation enables precise control of the transistor current by independently adjusting the voltage on each gate, achieving high current control precision while maintaining a relatively simple routing structure.
Data Source
AI summary
Disclosed are a display panel and a driving method therefor, and a display device. Two adjacent rows of sub-pixels are taken as a row group, and the row group is provided with a first sub row group and a second sub row group that are arranged in a column direction; a gate electrode of a first transistor in the first sub row group is electrically connected to a first gate line; a gate electrode of a second transistor in the second sub row group is electrically connected to a second gate line; two adjacent sub-pixels in the column direction share one third transistor, and a gate electrode of the third transistor in the row group is electrically connected to a third gate line; and the first transistor and the second transistor in one column of sub-pixels are electrically connected to a data line by means of the shared third transistor.