Double-Gate Transistor Gate Polarity Selection

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Solution Overview

Problem

Thin film transistors in display devices deteriorate due to stress from bias voltage, temperature, and light, leading to erratic threshold voltages and driving defects, which affect the performance and reliability of the display.

Innovation Solution

The use of double-gate transistors with a first top gate electrode and a second bottom gate electrode, where the electrical connection between the two gates is selected based on the polarity of the voltage applied, allowing for optimal transistor selection depending on the stress environment to minimize deterioration.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Ease of manufacture

If thin film transistors are used in display devices, then the display device can be manufactured with conventional processes, but the transistors deteriorate due to stress from bias voltage, temperature, and light

Engineering Contradiction:
ImprovemanufacturabilityVSAvoidtransistor stability
Core Design Contradiction:
Ease of manufactureVSReliability

Solution Approach 1:

The transistor gate is divided into two separate gates (first gate electrode and second gate electrode) instead of a single gate. This segmentation allows independent control of each gate, enabling the first gate to be optimized for driving functionality while the second gate is optimized for stress compensation, thereby resolving the contradiction between manufacturability and reliability

Inventive Principle:
Principle #1Segmentation

Solution Approach 2:

The patent applies different voltages to the first and second gates to compensate for stress effects. By changing the voltage parameters applied to each gate independently, the threshold voltage shift caused by stress from bias voltage, temperature, and light can be compensated, maintaining transistor reliability while using conventional manufacturing processes

Inventive Principle:
Principle #35Parameter changes

2Device complexity

If the electrical connection between the two gates is fixed, then the device structure is simple, but the transistor performance varies under different stress conditions

Engineering Contradiction:
Improveconnection structureVSAvoidtransistor performance stability
Core Design Contradiction:
Device complexityVSReliability

Solution Approach 1:

The electrical connection between the two gates is made dynamic rather than fixed. The second gate electrode can be connected to different potentials (first potential, second potential, or floating state) depending on the operating conditions and stress environment. This dynamic reconfigurability allows the transistor to adapt to different stress conditions, maintaining performance stability while keeping the overall device structure relatively simple

Inventive Principle:
Principle #15Dynamics

Solution Approach 2:

The patent changes the electrical connection parameters between the two gates based on stress conditions. By adjusting the voltage applied to the second gate or its connection state (connected to first potential, second potential, or floating), the transistor can compensate for threshold voltage shifts under different stress environments, resolving the contradiction between structural simplicity and performance stability

Inventive Principle:
Principle #35Parameter changes

Data Source

PatentUS9870735B2Display device including double-gate transistors with reduced deterioration
Publication Date: 2018.01.16 SAMSUNG DISPLAY CO LTD
  • US9870735B2 patent drawing
  • US9870735B2 patent drawing
  • US9870735B2 patent drawing

AI summary

A display device includes: a plurality of pixels, wherein each of the plurality of pixels includes at least two double-gate transistors including a first gate electrode and a second gate electrode; conduction between source electrodes and drain electrodes of the at least two double-gate transistors is controlled by a voltage applied to the first gate electrode, and electrical connection between the second gate electrode and the first gate electrode of each of the at least two double-gate transistors is determined depending on a polarity of a voltage applied on average to each of the at least two double-gate transistors.