Double Patterning for Semiconductor Active Area Control
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Solution Overview
Problem
Current methods for forming active areas and isolation regions on semiconductor substrates face challenges in achieving precise control over critical dimensions and shape due to diffraction and process variations, even with Optical Proximity Correction (OPC), leading to intolerable variations in corner rounding and critical dimensions as device sizes shrink.
Innovation Solution
A method involving two photolithography processes is employed, starting with the formation of parallel trenches in a polysilicon layer, followed by a central trench perpendicular to them, and subsequent etching and filling with insulation material, allowing for independent control of critical dimensions without the need for special OPC corrections.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Ease of manufacture
If single photolithography process with OPC is used, then manufacturing process is simple, but manufacturing precision of critical dimensions deteriorates
Solution Approach 1:
The single photolithography process is segmented into multiple sequential lithography steps. First, isolation trenches are formed using one photolithography process, then active area patterns are formed using a second photolithography process. This segmentation allows each step to be optimized independently, achieving better critical dimension control without requiring complex OPC corrections.
Solution Approach 2:
The method performs preliminary formation of isolation trenches before forming active area patterns. By pre-defining the isolation regions first, the subsequent active area patterning can be performed with better precision since the isolation structures are already in place, eliminating the need for complex OPC to compensate for interactions between isolation and active area features.
2Area of moving object
If device size is reduced, then device density increases, but manufacturing precision of pattern shape deteriorates
Solution Approach 1:
By separating the formation of isolation regions and active areas into distinct lithography steps, each pattern type can be optimized for its specific dimensional requirements. This allows smaller device dimensions to be achieved while maintaining pattern fidelity, as each step can use exposure parameters optimized for the feature size being formed.
Solution Approach 2:
The method applies different patterning conditions and parameters for different regions of the substrate. Isolation trenches and active areas are formed with different exposure and development conditions optimized for their respective critical dimensions, allowing precise control even as overall device size decreases.
3Manufacturing precision
If OPC is applied to correct distortions, then pattern accuracy improves, but device complexity increases
Solution Approach 1:
The complex patterning task is divided into simpler sub-tasks performed in sequence. Instead of using a single complex OPC-corrected mask for both isolation and active area patterns, two simpler masks are used, each optimized for its specific function. This reduces the complexity of individual masks while achieving the same or better overall pattern accuracy.
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
This method provides better control over the pattern and critical dimensions of active areas and isolation regions, ensuring uniformity and accuracy without relying on OPC, thereby improving the electrical properties of semiconductor devices.
Implementation Method 1
forming a photo resist material on the second material; selectively removing the photo resist material to expose columns of the second material
Implementation Method 2
forming a second photo resist material on the second material; selectively removing a strip of the second photo resist material to expose a row of the second material
Data Source
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AI summary
A method of forming active areas and isolation regions in a semiconductor substrate using a double patterning process. The method include forming a first material on the substrate surface, forming a second material on the first material, forming a plurality of first trenches into the second material wherein the plurality of first trenches are parallel to each other, forming a second trench into the second material wherein the second trench is perpendicular to and crosses the plurality of first trenches in a central region of the substrate, filling the first and second trenches with a third material, removing the second material to form third trenches in the third material that are parallel to each other and do not extend through the central region of the substrate, and extending the third trenches through the first material and into the substrate.