Double Patterning Lithography for FinFET Spatial Density
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Solution Overview
Problem
Current lithography processes struggle to achieve high spatial densities in integrated circuit manufacturing due to limitations in feature size and pitch, particularly when using deep ultraviolet, far ultraviolet, or extreme ultraviolet radiation, and existing double patterning techniques are incompatible with certain photoresist chemistries.
Innovation Solution
A double patterning process involving a first photoresist layer exposed and developed, followed by a protection layer modification to render it immune to subsequent exposure, and a second photoresist layer exposed and developed without affecting the first pattern, resulting in interspersed features with higher spatial frequency.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Manufacturing precision
If multiple exposures of photoresists are performed to reduce feature pitch, then spatial density of features is improved, but compatibility with certain photoresist chemistries deteriorates
Solution Approach 1:
The patent segments the double patterning process into distinct stages: first photoresist exposure and development, protection layer deposition and modification, second photoresist exposure and development. This segmentation allows each layer to perform its specific function without interfering with others, enabling compatibility with various photoresist chemistries including DUV, FUV, and EUV ranges.
Solution Approach 2:
The protection layer acts as an intermediary between the first and second photoresist layers. It is modified in regions contacting the first photoresist pattern to become substantially immune to subsequent exposure and developing steps, thereby protecting the first pattern while allowing the second pattern to be formed without affecting the first.
2Stability of the object's composition
If DUV exposure is used to stabilise the first photoresist pattern, then pattern stability is improved, but compatibility with DUV/FUV/EUV photoresists deteriorates
Solution Approach 1:
The protection layer serves as an intermediary that provides the necessary stability function without requiring DUV exposure. It is deposited over the first photoresist pattern and modified in contact regions to become substantially immune to subsequent exposure and developing steps, thereby stabilizing the first pattern while being compatible with DUV, FUV, and EUV photoresist chemistries.
Solution Approach 2:
The protection layer's properties are changed through modification in regions contacting the first photoresist pattern, transforming it from a state susceptible to exposure and developing to a state that is substantially immune. This parameter change enables the protection layer to provide stability without conflicting with various photoresist chemistries.
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
This process allows for the definition of features with higher spatial frequency than single-mask techniques, effectively extending the capability to smaller geometries and improving the resolution of finFET devices by reducing optical proximity effects and enabling more precise control over critical dimensions.
Implementation Method 1
exposing the first photoresist using a first mask
Implementation Method 2
treating the protection layer to cause a change therein where it is in contact with the first photoresist, to render the changed protection layer substantially immune to a subsequent exposure and/or developing step
Implementation Method 3
exposing the second photoresist layer using a second mask
Data Source
AI summary
A method of forming a pattern in at least one device layer in or on a substrate comprises: coating the device layer with a first photoresist layer; exposing the first photoresist using a first mask; developing the first photoresist layer to form a first pattern on the substrate; coating the substrate with a protection layer; treating the protection layer to cause a change therein where it is in contact with the first photoresist, to render the changed protection layer substantially immune to a subsequent exposure and/or developing step; coating the substrate with a second photoresist layer; exposing the second photoresist layer using a second mask; and developing the second photoresist layer to form a second pattern on the substrate without significantly affecting the first pattern in the first photoresist layer, wherein the first and second patterns together define interspersed features having a spatial frequency greater than that of the features defined in each of the first and second patterns separately. The process has particular utility in defining source, drain and fin features of finFET devices with a smaller feature size than otherwise achievable with the prevailing lithography tools.