Double-Patterning MRAM for Reducing MTJ Pitch

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Solution Overview

Problem

Conventional fabrication processes for magnetic tunnel junctions (MTJs) in MRAM face challenges in reducing MTJ pitch while maintaining structural integrity, leading to limitations in increasing MRAM bit cell density due to issues with sidewall damage and electrical shorts.

Innovation Solution

A double-patterning process is employed to reduce MTJ pitch by allowing MTJs in an MRAM array to share a common bottom electrode, reducing etch depth and time, and minimizing lateral projections of sidewalls, thereby avoiding electrical shorts and enabling more dense packing of MRAM bit cells.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Quantity of substance

If conventional fabrication processes are used to reduce MTJ pitch, then MRAM bit cell density increases, but sidewall damage and electrical shorts occur

Engineering Contradiction:
ImproveMRAM bit cell densityVSAvoidstructural integrity
Core Design Contradiction:
Quantity of substanceVSReliability

Solution Approach 1:

The fabrication process is segmented into multiple etching stages: a first etch process creates initial trenches with sufficient depth, followed by a second etch process that completes the trench formation. This segmentation allows each etching step to operate within optimal parameters, preventing sidewall damage while achieving the required pitch reduction and maintaining structural integrity.

Inventive Principle:
Principle #1Segmentation

2Quantity of substance

If MTJ pitch is reduced to increase bit cell density, then storage capacity increases, but electrical shorts between adjacent MTJs occur

Engineering Contradiction:
Improvebit cell densityVSAvoidelectrical shorts
Core Design Contradiction:
Quantity of substanceVSObject-affected harmful factors

Solution Approach 1:

A preliminary etching process is performed to create trenches with controlled depth and geometry before final trench completion. This preliminary action establishes proper separation between adjacent MTJs, preventing electrical shorts while enabling the reduced pitch necessary for increased bit cell density.

Inventive Principle:
Principle #10Preliminary action

3Reliability

If etch depth is increased to prevent electrical shorts, then reliability improves, but manufacturing complexity increases

Engineering Contradiction:
Improveelectrical separationVSAvoidfabrication process complexity
Core Design Contradiction:
ReliabilityVSDevice complexity

Solution Approach 1:

The complex deep etching requirement is segmented into multiple simpler etching steps. Each step uses standard etching parameters that are already established in the fabrication process, avoiding the need for complex single-step deep etching while achieving the same reliability outcome through systematic process decomposition.

Inventive Principle:
Principle #1Segmentation

Applied Scientific Principles

This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.

Function Achieved in This Case

The double-patterning process effectively reduces MTJ pitch, allowing for increased MRAM bit cell density without compromising structural integrity or causing electrical shorts, thereby enhancing storage capacity in a given area.

Implementation Method 1

A double-patterning process is employed to reduce MTJ pitch by allowing MTJs in an MRAM array to share a common bottom electrode, reducing etch depth and time, and minimizing lateral projections of sidewalls

Methodology Applied
Scientific EffectEtching:

Data Source

PatentUS10608174B2Double-patterned magneto-resistive random access memory (MRAM) for reducing magnetic tunnel junction (MTJ) pitch for increased MRAM bit cell density
Publication Date: 2020.03.31 QUALCOMM INC
  • US10608174B2 patent drawing
  • US10608174B2 patent drawing
  • US10608174B2 patent drawing

AI summary

Double-patterned magneto-resistive random access memory (MRAM) for reducing magnetic tunnel junction (MTJ) pitch for increased MRAM bit cell density is disclosed. In one aspect, to fabricate MTJs in an MRAM array with reduced MTJ row pitch, a first patterning process is performed to provide separation areas in an MTJ layer between what will become rows of fabricated MTJs, which facilitates MTJs in a given row sharing a common bottom electrode. This reduces the etch depth and etching time needed to etch the individual MTJs in a subsequent step, can reduce lateral projections of sidewalls of the MTJs, thereby relaxing the pitch between adjacent MTJs, and may allow an initial MTJ hard mask layer to be reduced in height. A subsequent second patterning process is performed to fabricate individual MTJs. Additional separation areas are etched between free layers of adjacent MTJs in a given row to fabricate the individual MTJs.