Double Pumped Memory Bank Control Circuitry
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Solution Overview
Problem
Configuring a memory device for double pumped operation poses technical challenges, including the need to operate at an internal clock frequency twice that of the external clock frequency, which can result in delays and inefficiencies, especially when accessing banks furthest from the control circuitry.
Innovation Solution
The memory device employs global control circuitry to generate a comparison signal between the banks indicated by the first and second accesses, allowing the local bank control circuitry to generate the second internal clock pulse independently, thereby avoiding dependencies on reset signals from other banks and reducing delay paths.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Productivity
If the memory device operates at an internal clock frequency twice that of the external clock frequency, then the data transmission rate is doubled, but delays and inefficiencies occur when accessing banks furthest from the control circuitry
Solution Approach 1:
The memory device is divided into multiple independent banks, each with its own local control circuitry. This segmentation allows parallel access to different banks without requiring centralized control for all operations, reducing the delay for banks furthest from the control circuitry while maintaining the doubled data transmission rate through double pumped operation.
Solution Approach 2:
The local bank control circuitry is pre-configured to independently generate the second internal clock pulse based on comparison signals, without waiting for reset signals from other banks. This preliminary preparation of control logic eliminates unnecessary waiting delays while preserving the high-speed double pumped data transmission capability.
2Reliability
If the local bank control circuitry waits for reset signals from other banks before generating the second internal clock pulse, then bank access coordination is ensured, but delay paths are increased
Solution Approach 1:
A comparison signal acts as an intermediary between the global control circuitry and local bank control circuitry. The comparison signal provides sufficient coordination information to ensure reliable bank access without requiring direct dependency on reset signals from other banks, thus reducing delay paths while maintaining access coordination.
Solution Approach 2:
Each bank's control circuitry is designed with local autonomy to generate its second internal clock pulse independently based on local comparison results. This local quality approach ensures that each bank can operate with minimal dependency on other banks, reducing delay paths while maintaining overall system coordination through the comparison mechanism.
Data Source
AI summary
A memory device and method of operating a memory device are provided. The memory device comprises global control circuitry configured to receive a clock signal for the memory device and the memory device is configured to perform a double memory access in response to a single edge of the clock signal. A first internal clock pulse for a first access of the double memory access and a second internal clock pulse for a second access of the double memory access are generated in response to the single edge of the clock signal. The global control circuitry generates a comparison signal in dependence on a comparison between a first bank indicated by the first access and a second bank indicated by the second access, and local bank control circuitry of the second bank is configured to generate the second internal clock pulse in dependence on the comparison signal.