Double Seal Ring Structure for RF-Safe Semiconductor Packaging

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Solution Overview

Problem

Conventional continuous seal ring structures in semiconductor devices degrade RF performance, necessitating a novel seal ring structure with improved RF performance while maintaining protection against moisture and contamination.

Innovation Solution

A double seal ring structure is implemented, comprising a first seal ring portion embedded in non-low-k dielectric layers with discontinuous patterns and a second seal ring portion embedded in low-k dielectric layers with continuous patterns, enhancing resistance and preventing contamination.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Reliability

If a conventional continuous seal ring structure is used, then protection against moisture and contamination is improved, but RF performance deteriorates

Engineering Contradiction:
Improveprotection against moisture and contaminationVSAvoidRF performance
Core Design Contradiction:
ReliabilityVSEase of manufacture

Solution Approach 1:

The seal ring structure is divided into two distinct portions: a first seal ring portion with discontinuous patterns embedded in non-low-k dielectric layers, and a second seal ring portion with continuous patterns embedded in low-k dielectric layers. This segmentation allows each portion to serve different functions - the discontinuous first portion maintains RF performance by reducing parasitic capacitance, while the continuous second portion provides effective moisture and contamination barrier protection.

Inventive Principle:
Principle #1Segmentation

2Reliability

If a double seal ring structure is implemented, then resistance is increased and contamination is prevented, but device complexity increases

Engineering Contradiction:
Improveresistance and contamination preventionVSAvoidseal ring structure complexity
Core Design Contradiction:
ReliabilityVSDevice complexity

Solution Approach 1:

Different portions of the seal ring structure are assigned different qualities and configurations based on local requirements. The first seal ring portion uses discontinuous patterns in non-low-k dielectric layers where RF performance is critical, while the second seal ring portion uses continuous patterns in low-k dielectric layers where contamination protection is paramount. This local differentiation optimizes overall performance without uniformly increasing complexity throughout the entire device.

Inventive Principle:
Principle #3Local quality

Applied Scientific Principles

This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.

Function Achieved in This Case

The solution improves RF performance by increasing resistance and preventing moisture and ionic contamination, thereby enhancing the performance of RF devices while maintaining structural integrity during the wafer dicing process.

Implementation Method 1

the seal ring can block moisture, prevent damage from acid or alkaline chemicals, or diffusion of contaminating species

Methodology Applied
Scientific EffectPhysical barrier: Physical Containment

Implementation Method 2

The first seal ring portion includes first patterns arranged periodically and discontinuously... improves RF performance by increasing resistance

Methodology Applied
Scientific EffectElectrical resistance: Electrical Resistance

Implementation Method 3

the first dielectric layer has a first dielectric constant... the second dielectric layer has a second dielectric constant that is lower than the first dielectric constant

Methodology Applied
Scientific EffectDielectric constant: Dielectric Permittivity

Data Source

PatentUS20230361055A1Semiconductor device
Publication Date: 2023.11.09 MEDIATEK SINGAPORE PTE LTD
  • US20230361055A1 patent drawing
  • US20230361055A1 patent drawing
  • US20230361055A1 patent drawing

AI summary

A semiconductor device is provided. The semiconductor device includes a semiconductor substrate, a first dielectric layer, a second dielectric layer and a conductive seal ring structure. The semiconductor substrate has a circuit region and a seal ring region surrounding the circuit region. The first dielectric layer is disposed over the seal ring region, wherein the first dielectric layer has a first dielectric constant. The second dielectric layer is disposed between the semiconductor substrate and the first dielectric layer, wherein the second dielectric layer has a second dielectric constant that is lower than the first dielectric constant. The conductive seal ring structure is disposed in the seal ring region. The conductive seal ring structure includes a first seal ring portion embedded in the first dielectric layer, wherein the first seal ring portion includes first patterns arranged periodically and discontinuously.