Double-Side Cooling for Vertical Chip Stacks Using Silicon Carrier Cavities
Find Innovative SolutionsGenerate Solutions
Solution Overview
Problem
Vertically integrated high-performance chip stack packages face challenges in thermal management due to accumulating heat flux and thermal resistance with each additional tier, limiting heat removal capability and interconnect density, especially with conventional back-side cooling methods.
Innovation Solution
A combined symmetric silicon carrier fluid cavity and micro-channel cold plate system for double-face heat removal, utilizing a silicon carrier sandwich with fluid cavities and through-silicon vias to isolate cooling fluid from electronic components, allowing the use of water as a coolant and reducing mechanical stress and complexity.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Ease of manufacture
If conventional back-side cooling methods are used, then the structure is simple to implement, but the heat removal capability does not scale with the number of stacked dies
Solution Approach 1:
The cooling system is segmented into two independent cooling paths: a back-side cold plate for cooling the bottom of the chip stack, and front-side fluid cavities integrated into the silicon carrier for cooling the top surface of each die. This segmentation allows each cooling path to independently manage heat from different regions, enabling the system to scale with the number of stacked dies while maintaining manufacturing simplicity.
2Reliability
If interlayer-cooling is implemented to scale with the number of tiers, then the heat removal capability improves, but the interconnect density is limited to a 50 micron pitch or more
Solution Approach 1:
Instead of cooling from the interlayer spaces (horizontal dimension), the invention cools from the front surface of each die (vertical dimension) using fluid cavities integrated into the silicon carrier. This dimensional shift allows cooling channels to be positioned beneath each die without interfering with interconnect routing, enabling high interconnect density below 50 micron pitch while maintaining scaled heat removal capability.
3Quantity of substance
If more tiers are added to increase heat flux, then the heat removal requirement increases, but conventional cooling methods become insufficient
Solution Approach 1:
The cooling system divides the thermal management task into multiple segments, with each die having its own dedicated fluid cavity in the silicon carrier for front-side cooling, complemented by back-side cooling through the cold plate. This segmented approach allows heat from each tier to be independently managed, enabling the stack to scale to more tiers without thermal management becoming insufficient.
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
This approach nearly doubles the heat removal capacity of vertically integrated chip stacks, reduces thermal stress, and increases packaging yield by enabling higher heat flux levels and more tiers with minimal complexity, while maintaining high interconnect density and reducing the risk of electro-corrosion.
Implementation Method 1
an inlet manifold in fluid communication with the cold plate and the fluid cavity of the silicon carrier sandwich; and an outlet manifold in fluid communication with the cold plate and the fluid cavity of the silicon carrier sandwich
Implementation Method 2
The silicon carrier sandwich, the inlet manifold, and the outlet manifold are configured and dimensioned to electrically isolate the cooling fluid from the electronic components
Data Source
AI summary
A plurality of heat-dissipating electronic chips are arranged in a vertical chip stack. The electronic chips have electronic components thereon. A cold plate is secured to a back side of the chip stack. A silicon carrier sandwich, defining a fluid cavity, is secured to a front side of the chip stack. An inlet manifold is configured to supply cooling fluid to the cold plate and the fluid cavity of the silicon carrier sandwich. An outlet manifold is configured to receive the cooling fluid from the cold plate and the fluid cavity of the silicon carrier sandwich. The cold plate, the silicon carrier sandwich, the inlet manifold, and the outlet manifold are configured and dimensioned to electrically isolate the cooling fluid from the electronic components. A method of operating an electronic apparatus and a method of manufacturing an electronic apparatus are also disclosed. Single-sided heat removal with double-sided electrical input-output and double-sided heat removal with double-sided electrical input-output are also disclosed.