Double Side Molded Interposer for High Density IC Packaging
Find Innovative SolutionsGenerate Solutions
Solution Overview
Problem
Current integrated circuit packaging techniques face challenges such as increased manufacturing costs and decreased product yield due to the need for extra assembly steps in vertically stacked MCMs, as well as local and global planarization inconsistencies in package-on-package configurations, which hinder the achievement of higher chip densities and efficient space utilization.
Innovation Solution
The implementation of a double side molded interposer unit with an interposer substrate having an interposer top and bottom, where a first integrated circuit is mounted to the interposer bottom and a second integrated circuit to the interposer top, both being electrically connected, and encapsulated with chip covers, allowing for a base package that can be fully tested before assembly and reducing overall package height.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Quantity of substance
If vertically stacked MCM configuration is used to increase chip density, then the effective density of chips is improved, but the manufacturing cost increases and product yield decreases due to extra assembly steps required before testing
Solution Approach 1:
The patent applies preliminary action by enabling testing of the base package and its components before they are assembled into the final vertically stacked MCM configuration. This allows defects to be detected early in the manufacturing process, before additional assembly steps are performed, thereby reducing rework costs and improving overall product yield while maintaining high chip density
2Quantity of substance
If vertically stacked MCM configuration is used to increase chip density, then the effective density of chips is improved, but the device complexity increases due to extra assembly steps
Solution Approach 1:
The base package is fully tested and validated before being assembled into the stacked MCM configuration. This preliminary testing approach simplifies the overall manufacturing process by eliminating the need for complex in-situ testing procedures that would be required if components were assembled first and then tested, thereby reducing device complexity while maintaining high chip density
3Area of stationary object
If package on package configuration is used to achieve vertical stacking, then space utilization is improved, but planarization inconsistencies occur locally and globally
Solution Approach 1:
The base package undergoes complete testing and validation before assembly into the package-on-package structure. This preliminary action ensures that the base package meets all planarization and dimensional specifications before it becomes part of the stacked configuration, thereby preventing the propagation of planarization inconsistencies to the upper packages and maintaining manufacturing precision across the entire vertical structure
Data Source
AI summary
A method of manufacture of an integrated circuit package system includes: providing a base substrate; coupling a base integrated circuit on the base substrate; forming a double side molded interposer unit over the base integrated circuit including: providing an interposer substrate having an interposer top and an interposer bottom, mounting a first integrated circuit to the interposer bottom and electrically connected thereto, mounting a second integrated circuit to the interposer top and electrically connected thereto, and molding a first chip cover on the first integrated circuit and a second chip cover on the second integrated circuit; and coupling an external component to the double side molded interposer unit.