Double-Side Polishing Method for Wafer Flatness Control

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Solution Overview

Problem

Conventional double-side polishing methods for semiconductor wafers struggle to achieve stable overall and circumferential flatness due to variations in carrier thickness over time, leading to issues like outer circumference rise and sag, and require separate measurement and adjustment processes that reduce productivity.

Innovation Solution

A double-side polishing method that involves first and second polishing stages with measured flatness-based adjustments, including changes in polishing load, rotational speeds, and polishing time, to improve wafer flatness without relying on carrier thickness, enabling in-line measurement and more precise determination of polishing conditions.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Manufacturing precision

If separate measurement and adjustment processes are implemented to improve flatness precision, then manufacturing precision is improved, but productivity deteriorates due to apparatus stoppage and operator involvement

Engineering Contradiction:
Improveflatness precisionVSAvoidpolishing productivity
Core Design Contradiction:
Manufacturing precisionVSProductivity

Solution Approach 1:

The patent implements self-service by enabling the double-side polishing apparatus to automatically measure flatness and adjust polishing conditions without external operator intervention. The integrated control system performs measurement, analysis, and parameter adjustment autonomously, eliminating the need for manual measurement processes and keeping the apparatus continuously operational.

Inventive Principle:
Principle #25Self-service

Solution Approach 2:

The patent merges the measurement function and control function into the polishing apparatus itself. By integrating the flatness measuring device and control system within the polishing apparatus, the system combines polishing and measurement capabilities into a single unified system, eliminating separate measurement steps and maintaining continuous production flow.

Inventive Principle:
Principle #5Merging (Combining)

2Manufacturing precision

If carrier thickness is used as reference for adjusting finishing thickness, then overall flatness can be controlled, but reliability deteriorates due to carrier thickness variations over time

Engineering Contradiction:
Improveoverall flatness controlVSAvoidflatness control stability
Core Design Contradiction:
Manufacturing precisionVSReliability

Solution Approach 1:

The patent applies feedback by using actual flatness measurement results to dynamically adjust polishing conditions. Instead of relying on predetermined carrier thickness values, the system continuously measures flatness and uses this feedback to compensate for carrier wear and thickness variations, ensuring stable and reliable flatness control throughout the carrier's service life.

Inventive Principle:
Principle #23Feedback

Solution Approach 2:

The patent performs preliminary measurement of flatness before determining the next polishing batch conditions. By measuring the actual flatness state and using this information to pre-calculate optimal polishing parameters, the system proactively compensates for carrier thickness variations before they affect the polishing outcome, ensuring consistent reliability.

Inventive Principle:
Principle #10Preliminary action

Applied Scientific Principles

This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.

Function Achieved in This Case

This method stabilizes wafer flatness by adjusting polishing conditions based on measured flatness, effectively improving both overall and circumferential flatness without being affected by carrier thickness variations, while reducing productivity losses associated with separate measurement processes.

Implementation Method 1

a polishing pad 4 for polishing a surface of the wafer W

Methodology Applied
Scientific EffectAbrasion: Abrasion

Implementation Method 2

flatness of the polished wafer is measured

Methodology Applied
Scientific EffectSurface topology measurement:

Data Source

PatentUS9156123B2Double-side polishing method
Publication Date: 2015.10.13 SHIN ETSU HANDOTAI CO LTD
  • US9156123B2 patent drawing
  • US9156123B2 patent drawing
  • US9156123B2 patent drawing

AI summary

The present invention is directed to a double-side polishing method including interposing a wafer held by a carrier between upper and lower turn tables to which respective polishing pads are attached, and rotating and revolving the carrier while supplying a polishing agent to polish both surfaces of the wafer at the same time, the method including the steps of: first polishing at a high polishing rate; second polishing at a low polishing rate; measuring flatness of the polished wafer; and determining polishing conditions of the second polishing in a next polishing batch on a basis of the measured flatness. The method can stably improve the flatness of a wafer without being affected by variations in carrier thickness over time.