Double-Sided Capacitor Structure With Supported Tall Electrodes
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Solution Overview
Problem
The miniaturization of semiconductor devices leads to lateral instability and increased risk of collapse or overturning of bottom electrodes in capacitor arrays, limiting capacitance value and performance reliability.
Innovation Solution
A double-sided capacitor structure is formed by alternately stacking sacrificial and support layers, with conductive filling and auxiliary layers to enhance stability, and a method involving the formation of sub-auxiliary layers to support the electrodes and increase capacitance.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Quantity of substance
If the height of bottom electrodes is increased or the thickness is decreased to maintain high capacitance value in miniaturized devices, then the capacitance value is improved, but the lateral stability deteriorates causing electrode collapse or overturning
Solution Approach 1:
The patent transitions from single-sided electrode support to double-sided capacitor structure with electrodes extending through the substrate, utilizing the vertical dimension to provide lateral support. The through-substrate electrode configuration creates bilateral support that prevents collapse while maintaining high capacitance in miniaturized devices
Solution Approach 2:
The patent employs composite structures combining multiple materials including conductive materials for electrodes, dielectric materials for insulation, and sacrificial materials for structural support during fabrication. This composite approach enables both high capacitance and lateral stability through material property optimization
2Stability of the object's composition
If continuous lateral support layers are added to improve electrode stability, then the stability is improved, but the height limit of the support layer restricts the capacitance value
Solution Approach 1:
The patent resolves the height limitation by configuring electrodes to extend through the substrate in the vertical dimension, creating double-sided capacitors. This through-substrate approach provides lateral support through the electrode geometry itself rather than relying on limited-height lateral support layers, enabling higher capacitance values
Solution Approach 2:
The capacitor structure is segmented into multiple functional layers including conductive layers, dielectric layers, and sacrificial layers stacked alternately. This segmentation allows each layer to perform its specific function optimally while contributing to overall structural stability and capacitance
3Area of stationary object
If the lateral area of semiconductor device is decreased for miniaturization, then the device size is reduced, but the capacitance value decreases
Solution Approach 1:
The patent compensates for reduced lateral area by exploiting the vertical dimension through through-substrate electrodes and multi-layer stacking. The double-sided capacitor configuration extends capacitance-generating structures through the entire substrate thickness, maintaining high capacitance in miniaturized footprints
Solution Approach 2:
The patent implements nested multi-layer structures where conductive layers, dielectric layers, and sacrificial layers are stacked alternately to form compact three-dimensional capacitor arrays. This nesting approach maximizes capacitance density within the available lateral area by utilizing vertical space efficiently
Data Source
AI summary
A method for forming a double-sided capacitor structure includes: providing a base, the base including a substrate, a plurality of capacitor contacts located in the substrate, a stack structure located on a surface of the substrate and a plurality of capacitor holes running through the stack structure and exposing the capacitor contacts, the stack structure including sacrificial layers and support layers which are stacked alternately; successively forming a first electrode layer, a first dielectric layer and a second electrode layer on inner walls of the capacitor holes; forming a first conductive filling layer in the capacitor holes; forming an auxiliary layer for sealing the capacitor holes; removing a part of the auxiliary layers and several of the support layers and the sacrificial layers to expose the first electrode layer; and, forming a second dielectric layer and a third electrode layer.