Double-Sided Image Sensor Wafer Segmentation
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Solution Overview
Problem
Deeply scaled sub-micron CMOS processes for image sensors lead to pixel performance degradation due to shallow trench isolations and heavily doped retrograde wells, resulting in a trade-off between pixel size and image quality, with conventional solutions increasing complexity and thickness through wafer joining.
Innovation Solution
A double-sided image sensor is formed on a single semiconductor wafer, where one side includes a photodetector and the opposite side has support circuitry, allowing for separate CMOS process flows and reduced thickness and complexity by using both sides of the wafer efficiently.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Area of moving object
If deeply scaled sub-micron CMOS processes are used to reduce pixel size, then pixel dimensions decrease, but image quality degrades due to shallow trench isolations and heavily doped retrograde wells increasing dark current
Solution Approach 1:
The patent divides the image sensor into two separate wafers: one dedicated to photodetector arrays and another to CMOS support circuitry. This segmentation allows each wafer to be optimized independently, enabling the use of deeply scaled sub-micron CMOS processes on the support circuitry wafer while maintaining larger photodetector dimensions on the photodetector wafer, thus resolving the contradiction between small pixel size and image quality.
Solution Approach 2:
The patent transitions from a planar single-wafer architecture to a three-dimensional stacked architecture using wafer-level interconnect technology. By moving support circuitry to a separate wafer and stacking it beneath the photodetector array, the design achieves vertical integration that allows optimized photodetector sizing without compromising image quality, while still enabling small effective pixel footprints through the stacked configuration.
2Reliability
If photodetector and support circuitry are built on different wafers joined together, then pixel performance improves, but device thickness and complexity increase due to inter-wafer connectors
Solution Approach 1:
The patent introduces wafer-level interconnect technology as an intermediary solution that provides electrical coupling between the photodetector wafer and support circuitry wafer. This intermediary enables signal transmission between the two separate wafers while maintaining a compact integrated structure, thus improving pixel performance through separate optimization without proportionally increasing overall device complexity.
3Reliability
If photodetector and support circuitry are built on different wafers joined together, then pixel performance improves, but device thickness increases
Solution Approach 1:
The patent employs vertical stacking of two thin wafers to achieve three-dimensional integration. By distributing functionality across the vertical dimension rather than expanding laterally, the design maintains relatively thin individual wafer layers while achieving the performance benefits of separate photodetector and support circuitry optimization, thus improving pixel performance without proportionally increasing overall sensor thickness.
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
This approach maintains image quality while reducing the overall thickness and complexity of the image sensor, enabling smaller pixel sizes without degrading image quality and simplifying the manufacturing process.
Implementation Method 1
one side includes a photodetector
Data Source
AI summary
An example double-sided image sensor includes a semiconductor die, a photodetector, a charge-to-voltage converter, and support circuitry. The semiconductor die has a first side and a second side that is opposite the first side. The photodetector is disposed within the semiconductor die on the first side for accumulating an image charge in response to light incident on the first side. The charge-to-voltage converter is disposed within the semiconductor die on the first side. The transfer gate is also disposed on the first side of the semiconductor die between the photodetector and the charge-to-voltage converter to transfer the image charge from the photodetector to the charge-to-voltage converter. Support circuitry of the image sensor is disposed within the semiconductor die on the second side and is electrically coupled to the charge-to-voltage converter.