Double-Sided Interconnect Die Stacking With Shorter Die Links
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Solution Overview
Problem
The existing methods for stacking semiconductor dies often require additional interconnecting elements like interposers or TSVs, which increase complexity and cost, and lengthen die-to-die interconnects.
Innovation Solution
A semiconductor package design where a first die has interconnect layers on both sides, allowing direct coupling to a second die without intervening structures like TSVs or interposers, reducing die thickness and interconnect length.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If additional interconnecting elements like interposers or TSVs are used for die-to-die interconnection, then interconnection functionality is achieved, but device complexity and manufacturing cost increase
Solution Approach 1:
The patent extracts and eliminates the need for separate interconnecting elements (interposers, TSVs) by integrating interconnect functionality directly into the die structure itself. The interconnect layers are formed as part of the die fabrication process, removing the requirement for additional interconnection components and simplifying the overall device architecture.
Solution Approach 2:
The patent merges the interconnection function with the die structure by forming interconnect layers directly on the die surfaces. This consolidation eliminates the need for separate interposers or TSV structures, combining what were previously distinct components into a unified die-based solution that reduces complexity.
2Reliability
If additional interconnecting elements like interposers or TSVs are used for die-to-die interconnection, then interconnection functionality is achieved, but manufacturing cost increases
Solution Approach 1:
The patent extracts and eliminates the need for separate interconnecting elements (interposers, TSVs) by integrating interconnect functionality directly into the die structure. The interconnect layers are formed as part of the die fabrication process, removing the requirement for additional interconnection components and simplifying the overall device architecture.
Solution Approach 2:
The patent merges the interconnection function with the die structure by forming interconnect layers directly on the die surfaces. This consolidation eliminates the need for separate interposers or TSV structures, combining what were previously distinct components into a unified die-based solution that reduces complexity.
3Reliability
If additional interconnecting elements like interposers or TSVs are used for die-to-die interconnection, then interconnection functionality is achieved, but die-to-die interconnect length increases
Solution Approach 1:
The patent extracts and eliminates the need for separate interconnecting elements (interposers, TSVs) by integrating interconnect functionality directly into the die structure. The interconnect layers are formed as part of the die fabrication process, removing the requirement for additional interconnection components and simplifying the overall device architecture.
Solution Approach 2:
The patent transitions from vertical through-silicon interconnection (TSV) to lateral surface-based interconnection. By forming interconnect layers on the die surfaces that extend to edges or near-edges, the patent enables direct die-to-die coupling in a different spatial dimension, significantly reducing interconnect length and improving signal performance.
Data Source
AI summary
An apparatus is provided which comprises: a first die having a first surface and a second surface, the first die comprising: a first layer formed on the first surface of the first die, and a second layer formed on the second surface of the first die; a second die coupled to the first layer; and a plurality of structures to couple the apparatus to an external component, wherein the plurality of structures is coupled to the second layer.