Double-Sided Interconnect Die Stacking With Shorter Die-to-Die Links

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Solution Overview

Problem

The addition of interconnecting elements such as interposers or bridge dies for die-to-die connections in semiconductor stacking increases cost and complexity and extends die-to-die interconnect length.

Innovation Solution

A semiconductor package design where a first die has interconnect layers on both sides, allowing direct coupling to a second die without intervening structures like TSVs, reducing the need for additional die-to-die connections and maintaining a thin die thickness.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Reliability

If additional interconnecting elements (interposer, bridge die, TSV structures) are used for die-to-die connection, then connection reliability is improved, but device complexity and cost increase

Engineering Contradiction:
Improveconnection reliabilityVSAvoidstructure complexity
Core Design Contradiction:
ReliabilityVSDevice complexity

Solution Approach 1:

The patent extracts and eliminates the additional interconnecting elements (interposer, bridge die, TSV structures) from the conventional stacking architecture. By using double-sided interconnect layers directly on each die, the intermediate connection elements are removed entirely, simplifying the overall structure while maintaining connection reliability through direct die-to-die bonding.

Inventive Principle:
Principle #2Taking out (Extraction)

Solution Approach 2:

The patent merges the interconnection function into the die structure itself by forming interconnect layers on both front and back surfaces of each die. This integration eliminates the need for separate interconnecting elements, as each die becomes self-sufficient for both computation and interconnection purposes.

Inventive Principle:
Principle #5Merging (Combining)

2Reliability

If additional interconnecting elements are used for die-to-die connection, then connection reliability is improved, but manufacturing cost increases

Engineering Contradiction:
Improveconnection reliabilityVSAvoidmanufacturing cost
Core Design Contradiction:
ReliabilityVSEase of manufacture

Solution Approach 1:

The patent removes the expensive additional interconnecting elements (interposer, bridge die) from the manufacturing process. By using only the essential die structures with double-sided interconnect layers, material costs and manufacturing steps are reduced while maintaining connection reliability.

Inventive Principle:
Principle #2Taking out (Extraction)

Solution Approach 2:

The patent replaces expensive, complex interconnecting elements with simpler, more cost-effective die structures that achieve the same interconnection function through double-sided interconnect layers, reducing overall manufacturing cost.

Inventive Principle:
Principle #27Cheap short-living objects (Disposable)

3Reliability

If additional interconnecting elements are used for die-to-die connection, then connection reliability is improved, but die-to-die interconnect length increases

Engineering Contradiction:
Improveconnection reliabilityVSAvoidinterconnect length
Core Design Contradiction:
ReliabilityVSLength of moving object

Solution Approach 1:

The patent extracts and removes the intermediate interconnecting elements that physically extend the interconnect path. By enabling direct die-to-die bonding through double-sided interconnect layers, the physical distance signals must travel is minimized to just the bonding interface between adjacent dies.

Inventive Principle:
Principle #2Taking out (Extraction)

Solution Approach 2:

Instead of extending connections outward through intermediate elements, the patent inverts the approach by bringing connections directly together at the die bonding interface, effectively shortening the interconnect path to the minimum possible length.

Inventive Principle:
Principle #13The other way round (Inversion)

Data Source

PatentUS20250316650A1Monolithic chip stacking using a die with double-sided interconnect layers
Publication Date: 2025.10.09 INTEL CORP
  • US20250316650A1 patent drawing
  • US20250316650A1 patent drawing
  • US20250316650A1 patent drawing

AI summary

An apparatus is provided which comprises: a first die having a first surface and a second surface, the first die comprising: a first layer formed on the first surface of the first die, and a second layer formed on the second surface of the first die; a second die coupled to the first layer; and a plurality of structures to couple the apparatus to an external component, wherein the plurality of structures is coupled to the second layer.