Double-Sided Interconnect Die Stacking With Shorter Die-to-Die Paths
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Solution Overview
Problem
The use of additional interconnecting dies, such as interposers or bridge dies, in semiconductor stacking increases cost and complexity and extends die-to-die interconnect length.
Innovation Solution
A semiconductor package design where a first die has interconnect layers on both sides, allowing direct coupling to a second die without intervening structures like TSVs or interposers, reducing die thickness and interconnect length.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If additional interconnecting dies (interposers or bridge dies) are used to achieve die-to-die interconnection, then interconnection functionality is improved, but device complexity and manufacturing cost increase
Solution Approach 1:
The patent extracts and eliminates the additional interconnecting dies (interposers or bridge dies) from the stacking structure. By forming interconnect layers directly on both sides of each die, the invention removes the need for separate interconnection elements, thereby reducing device complexity while maintaining interconnection functionality.
Solution Approach 2:
The patent merges the interconnection function with the die structure itself by forming interconnect layers directly on the die surfaces. This integration eliminates the need for separate interconnecting dies, combining the functions of computation and interconnection into a single unified structure.
2Reliability
If additional interconnecting dies are used for die-to-die interconnection, then interconnection is achieved, but interconnect length increases
Solution Approach 1:
The patent removes the additional interconnecting dies that would extend the interconnect path. By forming interconnect layers directly on die surfaces, the interconnection is achieved through shorter, more direct pathways, reducing the overall interconnect length.
3Reliability
If additional interconnecting dies are used, then interconnection functionality is improved, but manufacturing cost increases
Solution Approach 1:
The patent extracts and eliminates the need for additional interconnecting dies from the manufacturing process. By forming interconnect layers directly on die surfaces using standard semiconductor fabrication techniques, the invention reduces the number of components that need to be manufactured, procured, and assembled, thereby reducing overall manufacturing cost.
Solution Approach 2:
The patent combines the interconnection function with the die fabrication process itself. By forming interconnect layers on die surfaces during the same manufacturing process, the invention eliminates the need for separate production and assembly of interconnecting dies, reducing manufacturing complexity and cost.
Data Source
AI summary
An apparatus is provided which comprises: a first die having a first surface and a second surface, the first die comprising: a first layer formed on the first surface of the first die, and a second layer formed on the second surface of the first die; a second die coupled to the first layer; and a plurality of structures to couple the apparatus to an external component, wherein the plurality of structures is coupled to the second layer.