Double-Sided Local Interconnect for High-Density Semiconductor Packaging

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Solution Overview

Problem

The semiconductor industry faces challenges in achieving high integration density and reliable electrical connections between stacked semiconductor packages due to thermal expansion mismatches and the need for interposers, which can lead to warpage and reliability issues.

Innovation Solution

A package component with a double-sided local interconnect component embedded in a redistribution structure provides electrical connections between integrated circuit dies, eliminating the need for interposers and reducing thermal expansion mismatches, thereby enhancing communication bandwidth and reliability.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Quantity of substance

If traditional semiconductor packaging with interposers is used to achieve high integration density, then component density is improved, but warpage and reliability issues worsen due to thermal expansion mismatches

Engineering Contradiction:
Improvecomponent densityVSAvoidpackage reliability
Core Design Contradiction:
Quantity of substanceVSReliability

Solution Approach 1:

The patent removes the interposer component from the packaging structure entirely. Instead of using an interposer to facilitate connections between stacked semiconductor packages, the invention directly connects the packages through conductive vias formed in the encapsulant material, thereby eliminating the source of thermal expansion mismatch while maintaining high integration density

Inventive Principle:
Principle #2Taking out (Extraction)

Solution Approach 2:

The patent employs a composite encapsulant material that provides both structural support and electrical conductivity. The encapsulant is formulated to include conductive particles or fillers that enable direct electrical connections between stacked packages, replacing the need for separate conductive interposer structures

Inventive Principle:
Principle #40Composite materials

2Ease of operation

If interposers are used to provide electrical connections between stacked packages, then connectivity is improved, but contact resistance increases and reliability decreases

Engineering Contradiction:
Improveelectrical connectivityVSAvoidcontact reliability
Core Design Contradiction:
Ease of operationVSReliability

Solution Approach 1:

The patent merges the functions of the encapsulant and the conductive connection path into a single integrated structure. The conductive vias are formed directly within the encapsulant material, combining the protective encapsulation function with the electrical connection function, thereby reducing the number of interfaces and potential contact resistance points

Inventive Principle:
Principle #5Merging (Combining)

Solution Approach 2:

The conductive encapsulant acts as an intermediary medium that directly bridges the electrical connection between stacked semiconductor packages. This intermediary material provides a low-resistance conductive path while maintaining mechanical and thermal stability, eliminating the need for separate interposer structures

Inventive Principle:
Principle #24Intermediary (Mediator)

3Ease of manufacture

If conventional packaging structures are used, then manufacturing simplicity is maintained, but communication bandwidth between integrated circuit dies is limited

Engineering Contradiction:
Improvemanufacturing simplicityVSAvoidcommunication bandwidth
Core Design Contradiction:
Ease of manufactureVSSpeed

Solution Approach 1:

The patent transitions from planar two-dimensional packaging to three-dimensional stacked packaging. By vertically stacking multiple semiconductor packages and forming conductive vias through the encapsulant in the vertical dimension, the invention achieves higher communication bandwidth and integration density while maintaining manufacturing simplicity through adapted fabrication processes

Inventive Principle:
Principle #17Another dimension (Dimensionality change)

Data Source

PatentUS20250279367A1Semiconductor Package and Method
Publication Date: 2025.09.04 TAIWAN SEMICONDUCTOR MANUFACTURING CO LTD
  • US20250279367A1 patent drawing
  • US20250279367A1 patent drawing
  • US20250279367A1 patent drawing

AI summary

A semiconductor structure includes a first redistribution structure, a first local interconnect component disposed on the first redistribution structure, and a first interconnect structure over a second side of the first local interconnect component. The first local interconnect component includes a first plurality of redistribution layers. The first plurality of redistribution layers includes a first plurality of conductive features on a first side of the first local interconnect component. Each of the first plurality of conductive features are coupled to respective conductive features of the first redistribution structure. The first interconnect structure includes a second plurality of conductive features and a third plurality of conductive features. The second plurality of conductive features are electrically coupled to the third plurality of conductive features through the first local interconnect component.