Double Sided Queue for Thread Block Divergence Management
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Solution Overview
Problem
In parallel processing architectures, such as those found in graphics processing units (GPUs), threads may become blocked due to divergence mechanisms, leading to unpredictable deadlocks and failure to ensure forward progress, especially when implementing locks or critical sections of code.
Innovation Solution
A system and method that allocates a queue data structure to a thread block, using a YIELD instruction to disable active threads, insert tokens to track divergent operations, and activate threads based on masks within the tokens, ensuring forward progress by managing divergences and synchronization points within a single-instruction, multiple-data (SIMD) architecture.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Productivity
If threads are executed concurrently in parallel processing architecture, then processing speed and productivity are improved, but threads may become blocked due to divergence mechanisms leading to deadlocks and failure to ensure forward progress
Solution Approach 1:
The patent segments the thread execution control by introducing a queue data structure that separately tracks active threads and yielded threads. This segmentation allows the system to manage different thread states independently, enabling concurrent execution while preventing deadlocks through structured state management. The queue divides thread control into distinct categories (active vs. yielded) allowing selective resumption without blocking all threads.
Solution Approach 2:
The patent introduces a queue data structure as an intermediary mechanism between thread execution and synchronization. This intermediary structure mediates the interaction between divergent threads by providing a controlled interface for yielding and resuming execution. The queue acts as a buffer that manages thread states, allowing threads to yield without causing immediate deadlock, thus ensuring forward progress while maintaining concurrency.
2Adaptability or versatility
If divergence mechanisms are implemented to allow thread branching, then adaptability and versatility are improved, but unpredictable deadlocks occur and forward progress cannot be guaranteed
Solution Approach 1:
The patent implements dynamic thread state management where threads can transition between active and yielded states based on runtime conditions. The queue structure dynamically adapts to different execution paths by allowing threads to yield when divergence occurs and resume when appropriate. This dynamic approach maintains branching capability while preventing deadlocks through flexible state transitions rather than rigid fixed paths.
Solution Approach 2:
The patent changes the state parameter of threads from binary (running/stopped) to multi-state (active/yielded/pending). By introducing the yielded state as an intermediate parameter, the system allows threads to pause execution without blocking others. This parameter change enables adaptability in thread execution paths while ensuring reliability by preventing deadlock through controlled state transitions.
3Reliability
If a queue data structure is allocated to manage thread states, then forward progress is guaranteed, but device complexity increases
Solution Approach 1:
The patent makes the queue data structure universal by using it for multiple purposes: tracking active threads, managing yielded threads, handling divergence, and coordinating synchronization. Instead of creating separate mechanisms for each function, the single queue structure serves all thread state management needs. This multi-functionality reduces overall system complexity while maintaining forward progress guarantee.
Solution Approach 2:
The patent merges thread state management functions into a single unified queue data structure. Rather than having separate queues or structures for active threads, yielded threads, and synchronization points, the implementation combines these into one integrated structure. This merging simplifies the overall system architecture and reduces the complexity burden while achieving reliable forward progress control.
Data Source
AI summary
A system, method, and computer program product for ensuring forward progress of threads that implement divergent operations in a single-instruction, multiple data (SIMD) architecture is disclosed. The method includes the steps of allocating a queue data structure to a thread block including a plurality of threads, determining that a current instruction specifies a yield operation, pushing a token onto the second side of the queue data structure, disabling any active threads in the thread block, popping a next pending token from the first side of the queue data structure, and activating one or more threads in the thread block according to a mask included in the next pending token.