Double SOI Layer Transfer for Thick Wafers With Low Deformation

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Solution Overview

Problem

Existing methods like the Smart Cutâ„¢ process struggle to achieve large thicknesses for both semiconductor and oxide layers in double SOI structures, and the bonding process is susceptible to deformation and defects, especially in larger wafers, limiting their suitability for applications like photonics.

Innovation Solution

A method involving sequential oxidation and layer transfer steps, including forming oxide layers on both faces of the support substrate and donor substrates, followed by atomic species implantation and controlled detachment, to create a double semiconductor-on-insulator structure with balanced thermal expansion and reduced deformation.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Manufacturing precision

If surface treatments such as heat treatments are applied to reduce surface roughness, then bonding quality improves, but wafer deformation increases

Engineering Contradiction:
Improvesurface roughnessVSAvoidwafer flatness
Core Design Contradiction:
Manufacturing precisionVSShape

Solution Approach 1:

The patent performs surface treatments at different stages of the multi-step process rather than attempting to treat the entire thick structure at once. By treating surfaces at intermediate stages when the structure is thinner, the thermal stress and deformation are reduced while still achieving the necessary surface quality for bonding.

Inventive Principle:
Principle #35Parameter changes

2Productivity

If large diameter wafers (300 mm) are used for industrial production, then productivity increases, but susceptibility to deformation during bonding increases

Engineering Contradiction:
Improveproduction capacityVSAvoidbonding quality
Core Design Contradiction:
ProductivityVSReliability

Solution Approach 1:

The patent segments the bonding process into multiple smaller bonding operations on 300mm wafers rather than attempting a single complex multi-layer bond. Each bonding step involves thinner layers and lower stresses, making the large diameter wafers manageable while maintaining high production capacity.

Inventive Principle:
Principle #1Segmentation

Applied Scientific Principles

This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.

Function Achieved in This Case

The method enables the production of double SOI structures with sufficient thicknesses for photonic applications, minimizing deformation and ensuring high-quality bonding, thus overcoming the limitations of conventional processes.

Implementation Method 1

the oxide layer, formed on the rear face of the support substrate, contributing to the preservation of the flatness of the support substrate during the first and second transfer stages

Methodology Applied
Scientific EffectThermal expansion: Thermal Expansion

Implementation Method 2

The Smart Cut process involves implanting atomic species, such as hydrogen (H) and/or helium (He), to create a weakened zone within a donor substrate

Methodology Applied
Scientific EffectIon implantation: Ion Implantation

Implementation Method 3

the donor substrate is detached at the weakened zone to transfer a thin layer of the donor substrate onto the recipient substrate

Methodology Applied
Scientific EffectFracture mechanics: Fracture Mechanics

Implementation Method 4

The bonding occurs between the surface of the recipient substrate and the surface of the oxide layer of the donor substrate

Methodology Applied
Scientific EffectAdhesion: Adhesive

Data Source

PatentEP4473559B1Process for fabricating a double semiconductor-on-insulator structure
Publication Date: 2026.03.18 SOITEC SA
  • EP4473559B1 patent drawingFigure 1~3
  • EP4473559B1 patent drawingFigure 4~6
  • EP4473559B1 patent drawingFigure 7~8

AI summary

The invention relates to a process for fabricating a double semiconductor-on-insulator structure comprising from a back side to a front side of the structure: a handle substrate, a first electrically insulating layer (1b), a first single-crystal semiconductor layer (2), a second electrically insulating layer (2b) and a second single-crystal semiconductor layer (3), the process being characterized in that it comprises: - a first step of formation of an oxide layer on the front and back sides of the handle substrate, to form the first electrically insulating layer (1b) and an oxide layer (1a') on the back side of the handle substrate, - a first step of layer transfer, to transfer the first single-crystal semiconductor layer (2), - a second step of formation of an oxide layer, to form the second electrically insulating layer (2b), - a second step of layer transfer, to transfer the second single-crystal semiconductor layer (3).