Double SOI Fabrication with Surface Smoothing for Second Bonding

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Solution Overview

Problem

The existing SMART CUT™ process for fabricating double semiconductor-on-insulator structures faces challenges in achieving a high-quality surface for bonding the second donor substrate, leading to defects and holes that affect the electrical performance and mechanical strength of the final structure.

Innovation Solution

A surface treatment process comprising rapid thermal annealing, thermal oxidation followed by deoxidation, long thermal annealing, and chemical-mechanical polishing is applied to the first transferred semiconductor layer to reduce roughness and defect density, thereby improving the bonding quality for the second layer transfer.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Reliability

If two successive SMART CUT processes are used to fabricate double SOI structures, then the double semiconductor-on-insulator structure is obtained, but defects and holes are formed between the receiver substrate and the second donor substrate due to surface roughness and defect density

Engineering Contradiction:
Improvebonding qualityVSAvoidsurface roughness
Core Design Contradiction:
ReliabilityVSManufacturing precision

Solution Approach 1:

The patent applies preliminary surface treatment actions (chemical-mechanical polishing, thermal annealing, and oxidation-deoxidation sequences) to the first transferred semiconductor layer before the second bonding operation. These treatments are performed in advance to reduce surface roughness and defect density, ensuring that when the second donor substrate is bonded, the surface is sufficiently smooth and defect-free to prevent hole formation and ensure high bonding quality.

Inventive Principle:
Principle #10Preliminary action

Solution Approach 2:

The patent changes physical and chemical parameters of the semiconductor layer surface through multiple treatments: mechanical polishing alters surface topology to reduce roughness, thermal annealing modifies temperature and crystalline structure to reduce defects, and oxidation-deoxidation sequences change chemical composition and surface properties. These parameter changes collectively transform the surface from a defective, rough state to a smooth, defect-free state suitable for high-quality bonding.

Inventive Principle:
Principle #35Parameter changes

2Reliability

If surface treatments are applied to reduce roughness and defect density, then bonding quality improves, but the process complexity and number of steps increase

Engineering Contradiction:
Improvebonding qualityVSAvoidprocess complexity
Core Design Contradiction:
ReliabilityVSDevice complexity

Solution Approach 1:

The patent merges multiple surface treatment operations (chemical-mechanical polishing, rapid thermal annealing, long thermal annealing, oxidation, and deoxidation) into a single integrated process flow between the first and second SMART CUT operations. Rather than treating these as separate, independent processes, they are combined into a unified surface preparation sequence that systematically addresses roughness and defects in a coordinated manner, improving bonding quality while managing overall process complexity through integration.

Inventive Principle:
Principle #5Merging (Combining)

Applied Scientific Principles

This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.

Function Achieved in This Case

The optimized surface treatment process significantly reduces the defect density and roughness of the first transferred semiconductor layer, minimizing the formation of holes and reducing the width of the peripheral ring, which enhances the bonding quality and mechanical strength of the double semiconductor-on-insulator structure.

Implementation Method 1

E1: rapid thermal annealing

Methodology Applied
Scientific EffectRapid thermal annealing: Annealing

Implementation Method 2

E2: a sequence including a thermal oxidation followed by a deoxidation

Methodology Applied
Scientific EffectThermal oxidation: Oxidation

Implementation Method 3

E4: chemical-mechanical polishing

Methodology Applied
Scientific EffectChemical-mechanical polishing: Abrasion

Data Source

PatentUS20250140601A1Process for fabricating a double semiconductor-on-insulator structure
Publication Date: 2025.05.01 SOITEC SA
  • US20250140601A1 patent drawing
  • US20250140601A1 patent drawing
  • US20250140601A1 patent drawing

AI summary

A method for fabricating a double semiconductor-on-insulator structure comprising the steps of: providing a first donor substrate and a handle substrate, forming a weakened zone in the donor substrate so as to delimit a first semiconductor layer to be transferred, bonding the first donor substrate to the handle substrate, a first electrically insulating layer being at the interface, and detaching at the weakened zone, treating the surface of the first transferred semiconductor layer comprising: a rapid thermal annealing, a thermal oxidation followed by a deoxidation, a smoothing heat treatment at a temperature of above 1000° C. in a non-oxidizing atmosphere, chemical-mechanical polishing, providing a second donor substrate of a second semiconductor layer to be transferred, transferring the second semiconductor layer, a second electrically insulating layer being at the interface.