DPD Feedback Filtering for Wider Multi-Channel RF Bandwidth
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Solution Overview
Problem
Current digital predistortion (DPD) systems face limitations in increasing bandwidth without significantly increasing complexity and cost, particularly in multi-channel wideband wireless transmitters, leading to inefficiencies and higher power consumption due to stringent RF/IF filter requirements and complex algorithm design.
Innovation Solution
The implementation of a DPD feedback signal with a narrow band-pass filter and a direct learning algorithm, along with the use of a duplexer to reduce the bandwidth requirements of digital and analog filters, allowing for a shared filter in multiband applications and reducing the need for high-cost multi-pole ceramic filters.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Speed
If DPD processing speed is increased to meet higher instantaneous bandwidth requirements, then bandwidth capability is improved, but system cost and power consumption increase due to higher sampling rates in FPGAs, DACs, and ADCs
Solution Approach 1:
The patent segments the DPD system into multiple parallel processing channels, each handling a portion of the total bandwidth. This allows the system to achieve high instantaneous bandwidth by distributing the processing load across multiple lower-speed processing paths, thereby avoiding the need for a single high-speed processing chain that would require higher sampling rates in FPGAs, DACs, and ADCs.
Solution Approach 2:
The patent transitions from a single-channel high-speed processing approach to a multi-channel parallel processing architecture. By adding the dimension of parallelism across multiple channels, the system achieves equivalent or higher effective processing speed without requiring each individual processing path to operate at proportionally higher sampling rates, thus reducing overall system complexity and power consumption.
2Speed
If DPD processing speed is increased to meet higher instantaneous bandwidth requirements, then bandwidth capability is improved, but power consumption increases due to sampling rate increases in FPGAs, DACs, and ADCs
Solution Approach 1:
The patent segments the DPD processing into multiple parallel channels, each operating at lower sampling rates. This segmentation reduces the power consumption of individual processing components (FPGAs, DACs, ADCs) since power consumption in these devices is directly related to their operating frequency and sampling rate. The cumulative effect across multiple lower-power channels achieves the required overall processing capability with reduced total power consumption.
3Speed
If DPD bandwidth is increased, then instantaneous bandwidth capability is improved, but memory effects increase causing the DPD algorithm to become more complex and requiring longer design, optimization and test time
Solution Approach 1:
The patent divides the wideband DPD problem into multiple narrower bandwidth channels, each with its own DPD algorithm. This segmentation reduces the memory effects within each individual channel since memory effects are generally bandwidth-dependent. Consequently, each channel's DPD algorithm is simpler and requires less design, optimization, and testing effort, while the aggregate system achieves the required wide instantaneous bandwidth through parallel processing.
Data Source
AI summary
A digital predistortion linearization method is provided for increasing the instantaneous or operational bandwidth for RF power amplifiers employed in wideband communication systems. Embodiments of the present invention provide a method of increasing DPD linearization bandwidth using a feedback filter integrated into existing digital platforms for multi-channel wideband wireless transmitters. An embodiment of the present invention utilizes a DPD feedback signal in conjunction with a low power band-pass filter in the DPD feedback path.