Digital Pre-Distorter Tap Delay Selection for Lower Complexity
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Solution Overview
Problem
Current digital pre-distorters (DPDs) face challenges in efficiently selecting optimal tap delays, which are crucial for linearizing non-linear electronic devices, due to high computational complexity and memory requirements.
Innovation Solution
The proposed solution employs a block orthogonal matching pursuit (OMP) algorithm to select tap delays for the basis functions representing the input-output characteristics of non-linear electronic devices, thereby reducing computational and memory burdens.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Measurement precision
If traditional delay selection methods are used to model memory effects in DPD, then model accuracy is improved, but computational complexity and memory requirements increase significantly
Solution Approach 1:
The patent extracts only the most significant delay values from the complete set of possible delays. By identifying and retaining only the dominant delay components that contribute most to memory effects, the system achieves acceptable model accuracy while dramatically reducing computational complexity and memory requirements compared to using all possible delays.
Solution Approach 2:
The patent embeds the delay selection process within an iterative optimization framework where delay values are progressively refined. The algorithm nests multiple levels of processing: initial delay estimation, iterative refinement based on error minimization, and final selection of optimal delay values, allowing the system to achieve high accuracy efficiently.
2Reliability
If all delay values are selected to accurately represent memory effects, then linearization performance is improved, but the dimension of the model becomes very large
Solution Approach 1:
The patent extracts only the essential delay values needed to represent memory effects accurately. By identifying the subset of delays that contribute most significantly to the non-linear device's memory behavior, the system maintains high linearization performance while keeping the model dimension manageable for practical implementation.
Solution Approach 2:
The patent applies partial action by selecting only the necessary portion of delay values rather than all possible delays. The algorithm determines the minimum set of delay values required to achieve satisfactory linearization performance, avoiding the excessive computational burden of using the complete set of delays.
3Speed
If greedy pursuit algorithms are used for delay searching, then delay selection speed is improved, but computational complexity becomes too high for practical online implementation
Solution Approach 1:
The patent segments the delay selection process into distinct stages: an offline training phase where the algorithm learns optimal delay values from training data, and an online operation phase where the pre-determined delays are applied without complex computation. This segmentation allows computationally intensive operations to be performed only during offline training, enabling practical online implementation.
Solution Approach 2:
The patent performs delay selection in advance during an offline training phase. The algorithm pre-computes and stores the optimal delay values before the DPD enters online operation mode. This preliminary action eliminates the need for complex real-time delay searching during online operation, achieving both speed and low computational complexity during actual deployment.
Data Source
AI summary
There is provided mechanisms for operating a digital pre-distorter for a non-linear electronic device. A method comprises receiving an input signal destined to be input to the non-linear electronic device. The method comprises selecting, for basis functions that represent input-output characteristics of the non-linear electronic device, a set of tap delays. The set of tap delays is selected using a block orthogonal matching pursuit algorithm. The method comprises obtaining an output signal by subjecting the input signal to a linearization function defined by the basis functions with the selected set of tap delays. The method comprises providing the output signal as input to the non-linear electronic device.