Synthesis Flow for DPE Array Component Configuration
Find Innovative SolutionsGenerate Solutions
Solution Overview
Problem
Configuring component instances from hardware library packages for execution on data processing engine arrays is challenging due to the need for precise parameter setting that aligns with both design requirements and hardware limitations, requiring a deep understanding of component performance and hardware architecture.
Innovation Solution
A method and system that automatically determine and generate parameters for component instances, partitioning them into kernels for parallel execution on multiple cores, and transform the application to meet performance metrics and hardware constraints, enabling compilation and execution on data processing engine arrays.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Manufacturing precision
If component instances are manually configured with parameters, then design precision can be achieved, but the complexity and time required increases significantly
Solution Approach 1:
The system performs preliminary analysis of the hardware library package components and pre-determines optimal parameter configurations before the actual application compilation. The synthesis flow pre-processes component instances, pre-calculates partitioning strategies, and pre-generates configuration parameters, thereby eliminating the need for manual parameter tuning during the design phase while maintaining high precision.
Solution Approach 2:
The synthesis flow enables component instances to self-configure by automatically analyzing their own parameters and hardware constraints. The system allows component instances to self-determine their partitioning into kernels and self-generate the necessary configuration parameters based on predefined performance metrics and hardware limitations, reducing human intervention and complexity.
2Productivity
If component instances are partitioned into multiple kernels for parallel execution, then productivity increases, but the difficulty of configuration and mapping increases
Solution Approach 1:
The system automatically segments component instances into multiple kernels based on performance requirements and hardware capabilities. The synthesis flow analyzes each component instance and divides it into appropriate number of kernels, assigning specific functions to each kernel, thereby enabling parallel execution while automating the complex segmentation process.
Solution Approach 2:
The system dynamically changes parameters such as the number of kernels, partitioning ratios, and resource allocation based on performance metrics and hardware constraints. The synthesis flow adjusts these parameters automatically to optimize parallel execution efficiency while simplifying the configuration process through automated parameter tuning.
3Adaptability or versatility
If hardware library packages are tailored to specific hardware resources, then adaptability improves, but the ease of operation decreases due to deep understanding requirements
Solution Approach 1:
The synthesis flow creates a universal configuration mechanism that can handle multiple hardware resources and component types through a unified process. The system generates hardware-agnostic configuration files and parameter sets that can be automatically adapted to different target hardware platforms, thereby maintaining high adaptability while simplifying the operator's task through standardized interfaces.
Solution Approach 2:
The synthesis flow acts as an intermediary layer between the hardware library package and the target hardware resource. It translates high-level component descriptions into hardware-specific configurations automatically, shielding the user from hardware-specific complexities while maintaining full adaptability to different hardware platforms through automated code generation and parameter mapping.
Data Source
AI summary
Implementing an application for a data processing engine (DPE) array can include detecting, using computer hardware, a component of a hardware library package instantiated by an application. The application is specified in source code and is configured to execute on a DPE array. An instance of the component is extracted from the application. The extracted instance specifies values of parameters for the instance of the component. The instance can be partitioned by generating program code defining one or more kernels corresponding to the instance of the component. The partitioning is based on a defined performance metric of the component and a defined performance requirement of the application. The application is transformed by replacing the instance of the component with the program code generated by the partitioning. The application, as transformed, is compiled into program code executable by the DPE array.


