DPLL Two-Point Modulation with Adaptive Delay Matching
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Solution Overview
Problem
Existing digital phase-locked loops (DPLLs) face performance degradation due to mismatched delays in two-point modulation paths, which limits their ability to effectively modulate wideband signals without disturbing normal operation.
Innovation Solution
A DPLL with adaptive delay matching, featuring a highpass and lowpass modulation path, where an adaptive delay unit dynamically adjusts the delay based on modulating signals and phase error signals to match the delays of both paths, and an adaptive scaling unit adjusts the gain to match the lowpass modulation path, ensuring optimal performance.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Speed
If two-point modulation is used to increase DPLL bandwidth for wideband modulation, then modulation bandwidth is improved, but performance degrades due to mismatched delay in modulation paths
Solution Approach 1:
The patent implements dynamic delay adjustment in the first modulation path by introducing a delay adjustment module that adapts the delay parameter based on operating conditions. This dynamic adjustment allows the system to maintain optimal performance across different modulation bandwidths while using two-point modulation, resolving the contradiction between increased bandwidth and maintained reliability
Solution Approach 2:
The patent employs feedback mechanisms where the delay adjustment module continuously monitors and adjusts the delay parameter in the first modulation path to match the second modulation path. This feedback control ensures that both modulation paths remain synchronized, preventing performance degradation while enabling wideband modulation through increased DPLL bandwidth
2Device complexity
If fixed delay is used in modulation paths, then device complexity is reduced, but modulation precision deteriorates due to delay mismatch
Solution Approach 1:
The patent segments the delay adjustment function into distinct modules: a delay adjustment module that controls the delay parameter and a gain adjustment module that controls the gain parameter. This segmentation allows for independent optimization of each function while maintaining overall system simplicity, achieving high modulation precision without excessive complexity
Solution Approach 2:
The patent adjusts the delay parameter dynamically based on operating conditions and feedback signals. By changing the delay parameter adaptively rather than using a fixed value, the system achieves high modulation precision across different bandwidths while keeping the adjustment mechanism relatively simple through parameter-based control
Data Source
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AI summary
A digital phase-locked loop (DPLL) supporting two-point modulation with adaptive delay matching is described. The DPLL includes highpass and lowpass modulation paths that support wideband and narrowband modulation, respectively, of the frequency and/or phase of an oscillator. The DPLL can adaptively adjust the delay of one modulation path to match the delay of the other modulation path. In one design, the DPLL includes an adaptive delay unit that provides a variable delay for one of the two modulation paths. Within the adaptive delay unit, a delay computation unit determines the variable delay based on a modulating signal applied to the two modulation paths and a phase error signal in the DPLL. An interpolator provides a fractional portion of the variable delay, and a programmable delay unit provides an integer portion of the variable delay.