DPLL Voltage Compensation for Temperature and Supply Drift
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Solution Overview
Problem
Digital phase locked loops (DPLLs) face challenges in maintaining phase lock due to temperature and power supply voltage drift, leading to increased power consumption and silicon area, as they require a wider range of fine control code to compensate for these changes, which can result in the fine control code running out of range.
Innovation Solution
A system and method that adjusts the power supply level to the digitally controlled oscillator (DCO) using a voltage adjustment unit, monitored by a logic unit, to keep the fine control code near the middle of its range, reducing the need for a wider range of fine control code and thus minimizing power consumption and silicon area.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If a wider range of fine control code is designed to compensate for temperature and power supply voltage drift, then the DPLL can maintain phase lock under varying conditions, but the DCO size increases resulting in higher power consumption and larger silicon area
Solution Approach 1:
The patent dynamically adjusts the power supply voltage to the DCO based on detected drift conditions. By changing the voltage parameter, the system compensates for temperature and power supply variations, allowing the fine control code to remain within a narrower range while maintaining phase lock reliability.
Solution Approach 2:
The patent implements a feedback mechanism that detects phase lock status and drift conditions, then adjusts the power supply voltage accordingly. This closed-loop control ensures the DCO operates optimally under varying conditions without requiring an excessively wide fine control code range.
2Reliability
If a wider range of fine control code is designed to compensate for temperature and power supply voltage drift, then the DPLL can maintain phase lock under varying conditions, but the silicon area increases
Solution Approach 1:
The patent changes the power supply voltage parameter to the DCO to compensate for environmental variations. This approach allows the use of a smaller, more compact fine control code structure while maintaining reliability across temperature and voltage drift conditions.
Solution Approach 2:
The patent introduces a voltage adjustment mechanism as an intermediary between the control logic and the DCO. This mediator compensates for drift effects, allowing the fine control code to operate within a narrower range and reducing the required silicon area for the control logic.
3Reliability
If the fine control code range is increased to prevent running out of range during drift, then phase lock can be maintained, but the logic unit complexity increases
Solution Approach 1:
The patent adjusts the power supply voltage parameter to compensate for drift, which allows the fine control code to remain within a fixed, manageable range. This eliminates the need for complex logic units that would be required to generate and manage a wider control code range.
Solution Approach 2:
The feedback mechanism monitors drift conditions and adjusts the voltage accordingly, keeping the fine control code within operational bounds. This simplifies the logic unit design compared to systems that would require complex code generation and management for wider ranges.
Data Source
AI summary
Described herein are apparatus, system, and method for controlling temperature drift and/or voltage supply drift in a digital phase locked loop (DPLL). The apparatus comprises a DPLL including a digital filter to generate a fine code for controlling a frequency of an output signal of a digital controlled oscillator (DCO) of the DPLL; a logic unit to monitor the fine code and to generate a compensation signal based on the fine code; and a voltage adjustment unit to update a power supply level to the DCO based on the compensation signal, wherein the updated power supply level to cause the digital filter to generate the fine code near the middle of an entire range of the fine code across various temperatures, and wherein the digital filter to generate the fine code near the middle of the entire range across power supply drift.