Two-Point DPLL Modulation for Wideband Stability Control

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Solution Overview

Problem

Conventional digital phase-locked loops (DPLLs) face challenges in modulating oscillators with wideband signals without disturbing their normal operation, especially when the bandwidth of the modulating signal exceeds the closed-loop bandwidth of the DPLL.

Innovation Solution

A DPLL design incorporating two-point modulation, which includes a phase-to-digital converter, a loop filter, a first processing unit for lowpass modulation, and a second processing unit for highpass modulation, allowing the application of input modulating signals to separate paths within the loop to effectively increase bandwidth and support wideband modulation while maintaining minimal disturbance.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Adaptability or versatility

If a single modulation path is used in a conventional DPLL, then the device complexity is low, but the bandwidth is limited to the closed-loop bandwidth and cannot support wideband modulation

Engineering Contradiction:
ImprovebandwidthVSAvoidmodulation path structure
Core Design Contradiction:
Adaptability or versatilityVSDevice complexity

Solution Approach 1:

The modulation function is segmented into two separate paths: a lowpass modulation path for narrowband signals and a highpass modulation path for wideband signals. Each path is optimized for its specific bandwidth range, allowing the DPLL to handle both narrowband and wideband modulation without compromising performance or stability.

Inventive Principle:
Principle #1Segmentation

2Adaptability or versatility

If the modulating signal bandwidth is wider than the closed-loop bandwidth, then wideband modulation capability is achieved, but the normal operation of the DPLL is disturbed

Engineering Contradiction:
Improvemodulation bandwidth capabilityVSAvoidDPLL operation stability
Core Design Contradiction:
Adaptability or versatilityVSReliability

Solution Approach 1:

By separating modulation into lowpass and highpass paths, wideband modulation signals are routed through the highpass path that does not pass through the loop filter, preventing disturbance to the DPLL's normal operation and maintaining stability while achieving wideband modulation capability.

Inventive Principle:
Principle #1Segmentation

Solution Approach 2:

The highpass modulation path acts as an intermediary that allows wideband modulation signals to reach the oscillator without passing through the loop filter, thereby mediating between the modulation signal and the DPLL core to prevent stability disturbance.

Inventive Principle:
Principle #24Intermediary (Mediator)

3Ease of operation

If modulation is applied prior to the loop filter, then narrowband modulation is supported, but wideband modulation cannot be performed without disturbing DPLL operation

Engineering Contradiction:
Improvenarrowband modulation supportVSAvoidwideband modulation capability
Core Design Contradiction:
Ease of operationVSAdaptability or versatility

Solution Approach 1:

The system segments modulation into two paths: the lowpass path applies modulation prior to the loop filter for narrowband signals, while the highpass path applies modulation after the loop filter for wideband signals, allowing both narrowband and wideband modulation capabilities to coexist without interference.

Inventive Principle:
Principle #1Segmentation

Data Source

PatentUS8076960B2Digital phase-locked loop with two-point modulation using an accumulator and a phase-to-digital converter
Publication Date: 2011.12.13 QUALCOMM INC
  • US8076960B2 patent drawing
  • US8076960B2 patent drawing
  • US8076960B2 patent drawing

AI summary

A digital phase-locked loop (DPLL) supporting two-point modulation is described. In one design, the DPLL includes a phase-to-digital converter and a loop filter operating in a loop, a first processing unit for a lowpass modulation path, and a second processing unit for a highpass modulation path. The first processing unit receives an input modulating signal and provides a first modulating signal to a first point inside the loop after the phase-to-digital converter and prior to the loop filter. The second processing unit receives the input modulating signal and provides a second modulating signal to a second point inside the loop after the loop filter. The first processing unit may include an accumulator that accumulates the input modulating signal to convert frequency to phase. The second processing unit may include a scaling unit that scales the input modulating signal with a variable gain.