DPRT-Based 2-D Convolution Architecture for Scalable FPGA Processing
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Solution Overview
Problem
Current image and video processing systems face limitations in efficiently executing 2-D convolutions and cross-correlations due to hardware scalability issues, particularly with direct implementations of 2-D FFTs, which require complex arithmetic units and are limited by the number of 1-D FFT processors available.
Innovation Solution
The development of fast and scalable architectures using the Discrete Periodic Radon Transform (DPRT) for computing 2-D convolutions and cross-correlations, allowing for efficient implementation in hardware such as FPGAs, with methods like FastConv and FastXCorr that compute results in a small number of clock cycles and are adaptable to available resources, utilizing 1-D convolutions and parallel pipelined processing.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Measurement precision
If direct implementation of 2-D FFTs is used for computing 2-D convolutions, then computation accuracy is improved, but hardware scalability deteriorates due to complex arithmetic units and limited number of 1-D FFT processors
Solution Approach 1:
The patent segments the 2-D convolution computation into multiple 1-D convolutions by applying separable kernels. Instead of implementing a complex 2-D FFT processor, the system divides the problem into smaller 1-D convolution operations that can be performed by simpler, more scalable hardware units. This segmentation allows the system to maintain computational accuracy while improving hardware scalability and adaptability.
Solution Approach 2:
The patent replaces the mechanical/computational complexity of 2-D FFT arithmetic units with an alternative approach using 1-D convolution operations. By substituting the direct 2-D FFT computation mechanism with a sequence of 1-D convolutions, the system achieves the same computational goal with hardware that is more scalable and adaptable to different device technologies.
2Productivity
If 2-D FFT processors are used for fast convolution computation, then computation speed is improved, but device complexity increases due to the number of required 1-D FFT processors
Solution Approach 1:
The patent segments the complex 2-D FFT processor into multiple simpler 1-D convolution units. By dividing the computation into smaller independent 1-D operations, the system achieves parallelization and improved computation speed without requiring a single complex 2-D FFT processor. This segmentation reduces device complexity while maintaining or improving productivity.
Solution Approach 2:
The patent transforms the 2-D convolution problem into a series of 1-D convolution problems by applying separable kernels. This dimensional reduction allows the system to use simpler 1-D processing units instead of complex 2-D processors, reducing device complexity while maintaining computation speed through parallel execution of multiple 1-D convolutions.
3Ease of manufacture
If fixed-point arithmetic is used for DPRT implementation, then hardware resource efficiency is improved, but computational precision may deteriorate compared to floating-point arithmetic
Solution Approach 1:
The patent changes the arithmetic parameter from floating-point to fixed-point, which improves hardware resource efficiency by enabling the use of simpler fixed-point arithmetic units instead of complex floating-point units. The system compensates for the potential precision loss through careful design of the fixed-point arithmetic operations and optimization of the DPRT algorithm to maintain adequate computational precision for image processing applications.
Data Source
AI summary
Fast and scalable architectures and methods adaptable to available resources, that (1) compute 2-D convolutions using 1-D convolutions, (2) provide fast transposition and accumulation of results for computing fast cross-correlations or 2-D convolutions, and (3) provide parallel computations using pipelined 1-D convolvers. Additionally, fast and scalable architectures and methods that compute 2-D linear convolutions using Discrete Periodic Radon Transforms (DPRTs) including the use of scalable DPRT, Fast DPRT, and fast 1-D convolutions.