DPU Exact-Match Packet Offload Without TCAM Route Reordering
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Solution Overview
Problem
Traditional packet processing systems incur high latency and require complex reordering of routes due to the use of TCAMs for longest prefix matching, leading to inefficient processing of network traffic.
Innovation Solution
Implementing a data processing unit (DPU) that offloads both control and data planes, utilizing exact match flow entries in CAM for L2 and L3 processing, and employing vector packet processing (VPP) to minimize latency and throughput.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Adaptability or versatility
If TCAMs are used for longest prefix matching, then routing flexibility is improved, but processing latency increases and device complexity increases
Solution Approach 1:
The patent segments the routing table into multiple CAM tables, each storing a portion of the routing entries. This segmentation allows parallel searching across multiple tables simultaneously, achieving longest prefix matching without the latency of traditional sequential TCAM operations. The segmentation principle divides the large routing table into manageable chunks that can be processed in parallel.
Solution Approach 2:
The patent introduces a software data plane as an intermediary layer between the hardware switch pipeline and the routing information base. This intermediary manages the complexity of routing table updates and conversions, translating high-level routing policies into exact match flow entries for the CAM tables, thereby reducing the complexity burden from the hardware path.
2Adaptability or versatility
If TCAMs are used for longest prefix matching, then routing flexibility is improved, but device complexity increases
Solution Approach 1:
The software data plane acts as an intermediary that manages the complexity of routing table conversions and updates. It translates high-level routing policies into exact match flow entries suitable for CAM tables, absorbing the computational complexity away from the hardware switch pipeline and reducing overall device complexity.
Solution Approach 2:
The patent uses exact match flow entries as simplified copies of traditional longest prefix match routing entries. These flow entries contain pre-processed routing information that can be directly matched in CAM tables, eliminating the need for complex longest prefix matching logic in hardware while maintaining routing flexibility.
3Adaptability or versatility
If CPU processes all packets, then packet processing flexibility is improved, but CPU processing load increases
Solution Approach 1:
The patent segments packet processing into two paths: a hardware switch pipeline for standard exact match routing and a software data plane for complex processing. This segmentation allows the majority of routine packets to be processed by the hardware pipeline in parallel, significantly reducing CPU processing load while maintaining flexibility for complex packets through the software path.
Solution Approach 2:
The hardware switch pipeline with CAM tables provides self-service for exact match routing decisions, automatically handling standard routing packets without CPU intervention. This self-service capability filters out routine traffic from the CPU, allowing it to focus on complex processing tasks and improving overall system productivity.
Data Source
AI summary
A method for processing packets, the method comprising receiving a packet by a data processing unit (DPU) operatively connected to a physical host, in response to receiving the packet, processing packet using a hardware switch pipeline in the DPU, wherein the processing the packet comprises using a plurality of match/action tables to identify an exact match flow entry for the packet, wherein the plurality of match/action tables do not contain any match flow entries that are not exact match flow entries, and initiating transmission of the packet towards its intended destination using the exact match flow entry.


