DPU-FPGA Remote Memory Access for GPU RDMA Scheduling

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Solution Overview

Problem

Current remote direct memory access (RDMA) technologies face limitations in managing congestion, scheduling, and latency, particularly in high-performance computing environments, leading to underutilization of GPUs and inefficient data transfer.

Innovation Solution

Implementing data processing units (DPUs) with field programmable gate arrays (FPGAs) to predict GPU memory access patterns and availability, enabling out-of-order operations and efficient data transfer across multiple GPUs using RDMA, with features like compression and decompression to optimize data flow.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Productivity

If traditional RDMA is used for memory access, then basic data transfer functionality is achieved, but GPU utilization is low and latency is high

Engineering Contradiction:
ImproveGPU utilizationVSAvoidlatency
Core Design Contradiction:
ProductivityVSLoss of time

Solution Approach 1:

The system performs preliminary actions by predicting future memory access patterns and pre-fetching data before it is actually needed. The forecast module analyzes historical access patterns and generates predictions about future memory requests, allowing the system to prepare data in advance and reduce latency when actual access occurs.

Inventive Principle:
Principle #10Preliminary action

Solution Approach 2:

The system dynamically adjusts memory access strategies based on real-time conditions. The forecast module continuously learns from actual memory access patterns and updates its predictions, while the scheduling system dynamically assigns memory access operations to appropriate DPUs based on current system state and predicted needs.

Inventive Principle:
Principle #15Dynamics

2Productivity

If centralized CPU management is used for memory access, then coordination is simplified, but system performance and concurrency are limited

Engineering Contradiction:
Improvesystem performanceVSAvoidcoordination complexity
Core Design Contradiction:
ProductivityVSDevice complexity

Solution Approach 1:

The system segments memory access management by distributing control from a centralized CPU to multiple independent DPUs (Data Processing Units). Each DPU independently manages memory access for its associated GPU, eliminating the bottleneck of centralized coordination while maintaining system performance through parallel processing.

Inventive Principle:
Principle #1Segmentation

Solution Approach 2:

Each DPU operates autonomously to manage its own memory access requests and coordinate with other DPUs through the forecast mechanism. The system achieves self-organization where DPUs independently predict needs and schedule transfers without requiring constant CPU intervention, reducing coordination complexity.

Inventive Principle:
Principle #25Self-service

3Productivity

If sequential memory access is enforced, then data consistency is ensured, but throughput and efficiency are reduced

Engineering Contradiction:
Improvedata transfer throughputVSAvoiddata consistency
Core Design Contradiction:
ProductivityVSReliability

Solution Approach 1:

The system performs preliminary actions by predicting future memory access patterns and pre-fetching data in advance. This allows multiple memory operations to be overlapped in time, with data being prepared before it is actually needed, thereby achieving high throughput while maintaining consistency through predictive scheduling rather than strict sequential enforcement.

Inventive Principle:
Principle #10Preliminary action

Solution Approach 2:

The system maintains continuous useful action by overlapping memory access operations and keeping DPUs and GPUs continuously productive. Through predictive forecasting and pre-fetching, the system ensures that data is always ready when needed without idle waiting periods, achieving continuous throughput while maintaining data consistency through coordinated scheduling.

Inventive Principle:
Principle #20Continuity of useful action

4Productivity

If no prediction mechanism is used for memory access, then system simplicity is maintained, but resource allocation is inefficient

Engineering Contradiction:
Improveresource allocation efficiencyVSAvoidsystem complexity
Core Design Contradiction:
ProductivityVSDevice complexity

Solution Approach 1:

The system implements a forecast module that performs preliminary analysis of memory access patterns to predict future needs. This prediction mechanism enables proactive resource allocation and pre-fetching operations, significantly improving resource allocation efficiency while adding manageable complexity through automated pattern recognition.

Inventive Principle:
Principle #10Preliminary action

Solution Approach 2:

The system uses feedback mechanisms where actual memory access patterns are continuously monitored and fed back into the forecast module. This feedback loop allows the prediction algorithm to continuously improve its accuracy by learning from actual behavior, optimizing resource allocation efficiency while keeping the complexity manageable through iterative refinement.

Inventive Principle:
Principle #23Feedback

Data Source

PatentUS20250291760A1Remote memory access systems and methods
Publication Date: 2025.09.18 THE ALIGNED CO
  • US20250291760A1 patent drawing
  • US20250291760A1 patent drawing
  • US20250291760A1 patent drawing

AI summary

The present disclosure relates to systems and methods remote memory access between systems. In particular, some implementations relate to remote memory access using data processing units that can reduce loads on central processing units or other system components. Some implementations utilize scheduling algorithms to optimize memory transfers. Some implementations relate to data processing unit hardware that includes programmable logic, which can be configured for scheduling, data processing, and the like.