DQ Redundancy Code Pattern for DQ-DQS Jitter Tracking
Find Innovative SolutionsGenerate Solutions
Solution Overview
Problem
Source synchronous clock transmission systems experience timing loss due to jitter differences between the DQS and DQ signals, leading to data loss and incorrect reception, affecting communication reliability.
Innovation Solution
Configuring the DQ redundancy code with a specific pattern that matches the lowest n bits of the DQS preamble code, allowing the jitter of the DQ signal to track the jitter of the DQS signal, thereby reducing jitter difference and minimizing timing loss.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Measurement precision
If source synchronous clock transmission is used to achieve accurate clock synchronization, then data sampling precision is improved, but timing loss occurs due to jitter difference between DQ and DQS signals
Solution Approach 1:
The patent changes the pattern parameter of the DQ redundancy code to match the lowest n bits of the DQS preamble code. This parameter change causes the DQ signal jitter to track the DQS signal jitter, reducing the jitter difference between the two signals and minimizing timing loss at the receiving terminal.
Solution Approach 2:
The patent makes the DQ redundancy code pattern copy the lowest n bits of the DQS preamble code pattern. This copying approach ensures that both signals experience similar jitter characteristics, allowing the DQ jitter to follow the DQS jitter and reducing timing misalignment.
2Reliability
If DQ redundancy code is configured with specific pattern to reduce jitter difference, then timing loss is minimized, but device complexity increases due to register configuration requirements
Solution Approach 1:
The patent uses the existing DQ redundancy code structure and available registers to achieve jitter tracking. The system leverages existing resources (registers, code structures) rather than introducing new complex components, minimizing additional device complexity while achieving the timing accuracy improvement.
Data Source
AI summary
A signal transmitting method, an electronic device, and a communication system are provided. The signal transmitting method comprises: transmitting, by a transmitting terminal, a DQ redundancy code and a DQS preamble code to a receiving terminal during a preamble period, the DQ redundancy code is configured with a specific pattern such that jitter of a DQ signal tracks jitter of a DQS signal, and when the DQ redundancy code has the specific pattern, the lowest n bits of a pattern of the DQ redundancy code match the lowest n bits of a pattern of the DQS preamble code, where n is an integer greater than or equal to two; transmitting, by the transmitting terminal, the DQ signal and the DQS signal to the receiving terminal during a data transmission period. The signal transmitting method of the present disclosure helps to reduce timing loss.