DQPSK Demodulator Bias Point Control via Digital Feedback

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Solution Overview

Problem

Traditional methods for controlling the bias point of DQPSK demodulators are prone to external environment influences, have poor reliability, and can only lock the bias point at π/4 and -π/4, limiting flexibility and accuracy.

Innovation Solution

A method and apparatus that apply pilot voltage signals to both I-path and Q-path of the DQPSK demodulator, determine bias point real-time values through filtering processing, and perform feedback control to adjust the bias voltages, allowing locking at any expected bias point, implemented using a digital circuit for enhanced precision and stability.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Reliability

If an analog circuit is used to implement the control method, then the bias point can be locked at π/4 and -π/4, but the response characteristic is easily influenced by external environments and the reliability is poor

Engineering Contradiction:
Improvecontrol loop reliabilityVSAvoidexternal environment influence
Core Design Contradiction:
ReliabilityVSObject-affected harmful factors

Solution Approach 1:

The patent replaces the analog circuit implementation with a digital circuit implementation. The digital circuit processes the differential current signals through filtering and computational operations to determine bias point real-time values, eliminating the vulnerabilities of analog circuits to external environmental factors such as temperature drift, noise, and component aging. This substitution fundamentally improves reliability by using digital logic and algorithms that are inherently more stable and less susceptible to environmental variations.

Inventive Principle:
Principle #28Mechanics substitution (Replace mechanical system)

2Adaptability or versatility

If the bias point is locked only at π/4 and -π/4, then the control method is simple, but the flexibility and adaptability are limited

Engineering Contradiction:
Improvebias point locking flexibilityVSAvoidcontrol method complexity
Core Design Contradiction:
Adaptability or versatilityVSDevice complexity

Solution Approach 1:

The patent implements a dynamic bias point control mechanism where the bias point real-time values for the I-path and Q-path can be independently adjusted to any expected values, not fixed at π/4 and -π/4. The digital circuit calculates real-time bias point values based on filtering the differential current signals and applies feedback control to lock at these dynamically determined values. This dynamic approach enables the system to adapt to different operating conditions and requirements while maintaining control simplicity through automated digital processing.

Inventive Principle:
Principle #15Dynamics

3Measurement precision

If traditional analog control method is used, then the implementation is straightforward, but the precision and accuracy of bias point control are insufficient

Engineering Contradiction:
Improvebias point control precisionVSAvoidcontrol apparatus complexity
Core Design Contradiction:
Measurement precisionVSDevice complexity

Solution Approach 1:

The patent employs digital signal processing techniques including filtering operations on the differential current signals and computational algorithms to determine bias point real-time values with high precision. The digital circuit architecture provides superior resolution and accuracy compared to analog methods, as digital systems can represent and process values with arbitrary precision limited only by the number of bits used. The increased complexity is offset by the use of standard digital logic components and algorithms that provide robust and repeatable precision control.

Inventive Principle:
Principle #28Mechanics substitution (Replace mechanical system)

Data Source

PatentEP2549666B1Method and apparatus for bias point control of a differential quadrature phase shift keying demodulator
Publication Date: 2018.08.08 ZTE CORP
  • EP2549666B1 patent drawingFigure 1~2
  • EP2549666B1 patent drawingFigure 3~4
  • EP2549666B1 patent drawingFigure 5~6

AI summary

Method and apparatus for controlling bias point of DQPSK demodulator are disclosed. The method comprises: step 1: respectively applying first and second bias voltages to I-path and Q-path, and applying identical pilot voltage signals to I-path and Q-path (S202); step 2: executing filtering processing on I-path and Q-path differential current signals collected by balance receiver and determining θI and θQ (S204); step 3: performing feedback control to first and second bias voltages respectively according to θI and θQ so that θI and θQ respectively reaches expected bias point values of I-path and Q-path (S206); executing step 2 and 3 cyclically at preset regular intervals (S208), so that θI and θQ remains consistently the expected bias point values of I-path and Q-path. The solution enables bias point of DQPSK demodulator to be locked at any expected bias point value, facilitates realization of digitization, and is not easily influenced.