DQS Control Circuit for Semiconductor Memory Devices
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Solution Overview
Problem
Semiconductor memory devices with open drain or pseudo-open drain interfaces experience a ringing effect in the postamble section of the data strobe signal DQS, leading to invalid data acceptance, increased noise levels, and limited operation speed, especially at high frequencies.
Innovation Solution
A semiconductor device with a data strobe control signal generating circuit that sequentially changes the state of the postamble section from a low state to a high state and then to a high impedance state, using a combination of DQS control signals and clock signals to prevent direct impedance mismatch and reduce the ringing effect.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Speed
If the data strobe signal DQS directly transitions from low state to high impedance state in the postamble section, then the signal returns to high impedance level quickly, but impedance mismatch occurs causing ringing effect and voltage ripples
Solution Approach 1:
The patent segments the single transition from low state to high impedance state into two distinct stages: first transitioning from low state to high state, then from high state to high impedance state. This segmentation prevents direct impedance mismatch and eliminates the ringing effect while maintaining efficient signal transition.
Solution Approach 2:
The patent introduces an intermediate high state as a mediator between the low state and high impedance state. This intermediate state acts as a buffer that prevents direct impedance mismatch, thereby eliminating voltage ripples and ringing effects during the transition.
2Reliability
If the data strobe signal DQS maintains high impedance level during postamble section, then data output is completed, but total reflection occurs due to infinite input impedance causing ringing effect
Solution Approach 1:
The patent performs preliminary action by transitioning the signal to high state before the postamble section ends. This preliminary transition prepares the signal to avoid direct reflection when returning to high impedance state, thereby preventing total reflection and ringing effects.
Solution Approach 2:
The patent uses high state as an intermediary between low state and high impedance state during the postamble section. This intermediary prevents direct impedance mismatch that would cause total reflection, thereby eliminating harmful ringing effects while maintaining data output completion.
3Productivity
If the data strobe signal DQS transitions quickly to high impedance state, then operation speed is improved, but noise level increases due to ringing effect
Solution Approach 1:
The patent segments the transition process into two stages to prevent ringing effects that generate noise. By transitioning through an intermediate high state first, the signal achieves quick return to high impedance level without generating harmful noise from impedance mismatch and ringing.
Solution Approach 2:
The patent introduces high state as an intermediary to mediate the transition from low state to high impedance state. This intermediary prevents direct impedance mismatch that would generate noise, thereby maintaining high operation speed without increasing noise level.
Data Source
AI summary
Semiconductor devices having an interface of an open drain or a pseudo-open drain type are provided, and the semiconductor devices include a data strobe (DQS) control signal generating circuit, a DQS control circuit and an output unit. The generating circuit generates a first DQS control signal and a second DQS control signal, and the control circuit controls a data strobe signal by sequentially changing a state of a following section next to a postamble section of the data strobe signal in response to a clock signal; the first and second DQS control signals, from a first logical state of the postamble section to a second logical state, and then from the second logical state to a high impedance state after a first predetermined time. Operations at a high frequency may be possible by controlling a data strobe signal. Related controlling methods are provided.


