DQS Signal Phase Adjustment for DDR Temperature Drift
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Solution Overview
Problem
Existing methods for addressing bidirectional data strobe (DQS) temperature drift in double data rate SDRAM of field programmable gate arrays (FPGAs) face bottlenecks due to high-speed sampling circuit performance requirements, leading to unreliable temperature drift monitoring and adjustment.
Innovation Solution
A method and device that adjust the phase of the bidirectional DQS signal by receiving phase adjustment instructions, sampling the signal, determining correctness, and cycling these processes until a preset number of cycles is reached, using a first and second adjustment rule to stabilize the phase, thereby reducing the reliance on high-speed sampling circuit performance.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Measurement precision
If high-speed sampling circuit is used to perform 4x rate oversampling on DQS signal, then temperature drift monitoring capability is improved, but circuit design complexity and performance requirements become bottlenecks
Solution Approach 1:
The patent extracts the temperature drift monitoring function from the high-speed sampling circuit by using a separate low-speed sampling circuit. The low-speed sampling circuit samples the DQS signal at a reduced rate, and the temperature drift is calculated based on the phase difference between the sampled signal and the original signal. This separation eliminates the bottleneck of requiring 4x rate oversampling while maintaining temperature drift monitoring capability.
Solution Approach 2:
The patent replaces the mechanical high-speed sampling approach with a phase-based measurement approach. Instead of requiring high-speed sampling to capture temperature drift, the system uses phase difference measurement between the DQS signal and a reference signal to indirectly determine temperature drift. This substitution eliminates the need for high-speed sampling circuitry while achieving the same monitoring objective.
2Reliability
If 4x rate oversampling is performed on DQS signal, then temperature drift can be detected, but the sampling circuit performance requirement becomes a bottleneck in chip design
Solution Approach 1:
The patent extracts the temperature drift detection function from the high-speed sampling circuit by using a separate low-speed sampling circuit. The low-speed sampling circuit samples the DQS signal at a reduced rate, and the temperature drift is calculated based on the phase difference between the sampled signal and the original signal. This separation eliminates the bottleneck of requiring 4x rate oversampling while maintaining temperature drift monitoring capability.
Solution Approach 2:
The patent changes the sampling rate parameter from high-speed (4x rate) to low-speed sampling. By reducing the sampling rate and using phase difference measurement instead of direct high-speed signal capture, the system achieves reliable temperature drift detection without the manufacturing and design bottlenecks associated with high-speed sampling circuits.
3Measurement precision
If high-speed sampling circuit is used to sample DQS signal, then sampling accuracy is improved, but circuit performance requirements increase significantly
Solution Approach 1:
The patent replaces the mechanical high-speed sampling approach with a phase-based measurement approach. Instead of requiring high-speed sampling to capture temperature drift, the system uses phase difference measurement between the DQS signal and a reference signal to indirectly determine temperature drift. This substitution eliminates the need for high-speed sampling circuitry while achieving the same monitoring objective.
Solution Approach 2:
The patent extracts the temperature drift monitoring function from the high-speed sampling circuit by using a separate low-speed sampling circuit. The low-speed sampling circuit samples the DQS signal at a reduced rate, and the temperature drift is calculated based on the phase difference between the sampled signal and the original signal. This separation eliminates the bottleneck of requiring 4x rate oversampling while maintaining temperature drift monitoring capability.
Data Source
AI summary
The present application discloses a method for adjusting phase of a DQS signal, which is applied to the field of field programmable logic gate arrays and is used to solve the temperature drift problem of the DQS signal in DDR. The method provided by the present application includes: receiving a phase adjustment instruction, and adjusting phase of the DQS signal according to a preset first adjustment rule; receiving a signal sampling instruction to sample the DQS signal, and returning a sampling result of the DQS signal; determining whether the sampling result is correct, and storing a determination result; cycling steps of receiving the phase adjustment instruction to storing the determination result until a number of cycles reaches a preset number of times; according to the determination result corresponding to the number of cycles, adjusting the phase of the DQS signal according to a preset second adjustment rule.