DRAM Bank Refresh via Determination Circuit
Find Innovative SolutionsGenerate Solutions
Solution Overview
Problem
In Dynamic Random Access Memory (DRAM), refresh commands are only transmitted when all banks are idle, leading to inefficient refresh and prolonged memory cell degradation due to lack of refresh during active bank operations.
Innovation Solution
A determination circuit and refresh counters are used to detect enabled and disabled banks, allowing refresh commands to be sent to disabled banks with lower counter values, even when not all banks are idle, thereby increasing refresh and usage efficiency.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If refresh commands are only transmitted when all banks are idle, then system stability is maintained, but refresh efficiency deteriorates
Solution Approach 1:
The patent divides the refresh operation into bank-specific segments. Instead of requiring all banks to be idle for a refresh command, the system now processes refresh commands on a per-bank basis. The determination circuit identifies which specific bank needs refreshing and directs the refresh command only to that bank, allowing other banks to continue their operations. This segmentation resolves the contradiction by maintaining system stability through controlled refresh while improving refresh efficiency by not waiting for all banks to be idle.
Solution Approach 2:
The patent implements partial action by performing refresh operations on only the necessary banks rather than requiring all banks to be idle. The determination circuit identifies specific banks that need refreshing based on their individual refresh counter values, and refresh commands are issued only to those banks. This partial approach improves refresh efficiency while maintaining system stability by avoiding unnecessary interruptions to active banks.
2Stability of the object's composition
If refresh commands are transmitted only when all banks are idle, then bank operation interference is avoided, but memory cell degradation accelerates
Solution Approach 1:
The patent implements preliminary action by continuously monitoring refresh counter values for each bank and proactively issuing refresh commands before memory cells degrade. The determination circuit tracks the refresh status of each bank independently and initiates refresh operations on disabled banks or banks with lower counter values, preventing memory cell degradation before it occurs. This approach maintains bank operation stability while countering harmful degradation effects.
Solution Approach 2:
The system implements self-service through automatic refresh management. The determination circuit autonomously monitors bank status, identifies which banks need refreshing, and issues refresh commands without external intervention. This self-service mechanism ensures timely refresh operations to prevent memory cell degradation while maintaining bank operation stability, resolving the contradiction between avoiding interference and preventing degradation.
3Reliability
If the controller waits for all banks to be idle before transmitting refresh commands, then command conflict is prevented, but refresh timing is delayed
Solution Approach 1:
The patent segments the refresh command transmission process by bank. Instead of waiting for all banks to be idle before issuing any refresh command, the determination circuit identifies specific banks that are idle or disabled and issues refresh commands to those individual banks. This segmentation allows parallel processing of refresh operations across different banks, preventing command conflicts while reducing refresh delays.
Solution Approach 2:
The patent implements continuity of useful action by continuously monitoring bank status and continuously issuing refresh commands to eligible banks without unnecessary delays. The determination circuit maintains continuous operation by identifying available banks and immediately processing refresh commands, ensuring that refresh operations occur as soon as banks are available rather than waiting for a global idle state. This continuous approach reduces refresh delay while maintaining command execution reliability.
Data Source
AI summary
A memory includes a determination circuit, a plurality of refresh counters, and a plurality of banks. The determination circuit receives a refresh command. The plurality of refresh counters are coupled to the determination circuit. Each refresh counter of the plurality of refresh counters corresponds to one bank of the plurality of banks. The determination circuit detects whether a first bank of the plurality of banks is enabled or a number counted by a first refresh counter of the plurality of refresh counters corresponding to the first bank is equal to a predetermined value. Then, the determination circuit optionally refreshes one bank of the plurality of banks according to a detection result. Thus, the memory still refreshes an idle bank according to a refresh command even if the plurality of banks are not all idle.


