DRAM Word Line Multi-Composition Barrier Layer
Find Innovative SolutionsGenerate Solutions
Solution Overview
Problem
Existing DRAM cells with buried gates face defects due to limitations in fabrication technologies, leading to performance and reliability issues, despite their superior performance over conventional planar gate structures.
Innovation Solution
A DRAM device with word lines featuring a multi-composition barrier layer that is nitrogen-rich at the top and silicon-rich at the bottom, formed using a TiSixNy structure, which reduces resistance and improves device performance and reliability by acting as an ohmic contact layer and enhancing crystal grain formation.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If a conventional planar gate structure is used in DRAM cells, then fabrication is simpler, but current leakage is higher and performance is inferior
Solution Approach 1:
The gate structure is segmented into a conventional planar gate and a buried gate portion. The buried gate extends beneath the active region to provide additional channel control and reduce leakage current, while the planar gate maintains ease of fabrication. This segmentation allows the device to benefit from both结构简单性 and improved electrical performance.
Solution Approach 2:
The gate structure employs composite materials with different properties in different regions. The buried gate portion uses materials optimized for leakage reduction, while the planar gate uses materials optimized for fabrication ease. This composite approach resolves the contradiction between performance and fabrication simplicity.
2Productivity
If DRAM cell size is scaled down to increase integration level, then memory capacity increases, but fabrication defects increase
Solution Approach 1:
The gate structure is divided into planar and buried portions, allowing each to be optimized independently. The planar gate can be fabricated with existing mature processes, while the buried gate provides enhanced performance. This segmentation enables scaling without proportionally increasing defect rates.
Solution Approach 2:
The invention changes key structural parameters by introducing the buried gate depth and dimensions as additional design variables. This allows optimization of the gate structure for smaller cell sizes while maintaining fabrication feasibility, thereby increasing memory capacity without linearly increasing defect rates.
3Reliability
If a single-composition barrier layer is used in word lines, then fabrication is simpler, but resistance is higher and device performance is reduced
Solution Approach 1:
The barrier layer is designed with different compositions at different locations: a first barrier material at the interface with the gate electrode for optimal electrical contact, and a second barrier material at the interface with the gate dielectric for optimal insulation and stability. This local quality differentiation reduces overall resistance while maintaining fabrication feasibility.
Solution Approach 2:
The barrier layer uses a composite structure with two different materials, each selected for its specific properties at the respective interface. This composite barrier layer reduces resistance and improves device performance without requiring complex multi-step fabrication processes.
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
The multi-composition barrier layer effectively reduces resistance and improves the reliability and performance of DRAM devices by optimizing the contact resistance and crystal grain boundaries, while simplifying the fabrication process through atomic layer deposition.
Implementation Method 1
the bottom portion may serve as an ohmic contact layer thereto reduce the resistance of the barrier layer
Data Source
AI summary
A dynamic random access memory (DRAM) device includes a substrate, plural word lines and plural bit lines. The word lines are disposed in the substrate along a first trench extending along a first direction. Each of the word lines includes a multi-composition barrier layer, wherein the multi-composition barrier layer includes TiSixNy with x and y being greater than 0 and the multi-composition barrier layer is silicon-rich at a bottom portion thereof and is nitrogen-rich at a top portion thereof. The bit lines are disposed over the word lines and extended along a second direction across the first direction.


