DRAM Bit-Line Contact Protection Against Short Circuits
Find Innovative SolutionsGenerate Solutions
Solution Overview
Problem
The miniaturization of dynamic random access memory (DRAM) devices leads to challenges such as short circuits between bit-line contacts and capacitor contacts due to residual materials in the active areas, which affect the reliability and integration of the memory device.
Innovation Solution
The implementation of protective structures and a dielectric layer surrounding the bit-line contacts in an enclosed path to electrically isolate them from capacitor contacts, preventing short circuits and enhancing the memory device's reliability.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Manufacturing precision
If the critical dimension of DRAM is reduced to achieve miniaturization, then the integration and operating speed are improved, but residual materials remain in the corner of the active area causing short circuits between capacitor contact and bit-line contact
Solution Approach 1:
A protective layer is formed to cover the sidewall of the bit-line contact opening before filling the conductive material. This preliminary protective structure prevents residual materials from causing short circuits between the capacitor contact and bit-line contact, solving the reliability issue that arises from miniaturization.
Solution Approach 2:
The protective layer acts as an intermediary barrier between the bit-line contact opening and the capacitor contact area. It isolates the residual materials in the corner of the active area from creating conductive paths, thereby preventing short circuits while allowing the critical dimension to be reduced.
2Reliability
If protective structures are added to prevent short circuits, then reliability is improved, but device complexity increases
Solution Approach 1:
The protective layer is formed only on the sidewall of the bit-line contact opening, providing localized protection exactly where the short circuit risk exists. This targeted approach improves reliability without adding protective structures throughout the entire device, thereby minimizing the increase in device complexity.
Data Source
AI summary
Provided is a memory device including a substrate, a plurality of bit-line structures, a plurality of bit-line contacts, and a plurality of protective structures. The substrate has a plurality of active areas. The plurality of bit-line structures are disposed on the substrate in parallel along a X direction. The plurality of bit-line contacts are respectively disposed at overlaps of the plurality of bit-line structures and the plurality of active areas, and electrically connect the plurality of bit-line structures and the plurality of active areas. The plurality of protective structures are disposed at least on a first sidewall and a second sidewall of the plurality of bit-line contacts. A method of forming a memory device is also provided.