DRAM Cell Capacitance-Frequency Characteristic Testing

The patent applies preliminary action by conducting capacitance-frequency characteristic testing during the memory manufacturing process before the memory is shipped. The testing apparatus includes test circuits that can write test patterns at different frequencies and read back to detect abnormal capacitance-frequency characteristics of memory cells, allowing faulty cells to be identified and separated early in the production cycle.

The patent applies periodic action by testing memory cells at multiple specific frequencies during the manufacturing process. The test circuit writes test patterns at different frequencies and reads back the data to detect changes in capacitance-frequency characteristics. This periodic testing at various frequencies allows efficient detection of faulty cells without requiring continuous testing throughout the entire production cycle.

The patent applies self-service by designing a testing apparatus that uses the memory device's own structure and operations to perform self-testing. The test circuit leverages the memory cell's capacitor and transistor structure, writing test patterns and reading back data through the same bit lines and word lines used for normal memory operations. This self-testing capability increases memory yield by detecting and separating faulty cells without requiring external complex testing equipment.