DRAM Defect Map Storage in Non-Volatile Memory

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Solution Overview

Problem

Existing DRAM components face inefficiencies due to manufacturing defects and deterioration, leading to the need for redundant rows and columns to correct defective cells, which increases costs and reduces memory size, and often result in scrapping of components even when most of the DRAM is functional.

Innovation Solution

Incorporating non-volatile memory within the DRAM component to store references to defective volatile memory cells during manufacturing, allowing for their identification and mapping out of usable memory space, thereby reducing the need for redundant cells and increasing storage capacity.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Reliability

If redundant rows and columns are added to correct defective cells, then reliability is improved, but device complexity and manufacturing cost increase

Engineering Contradiction:
Improvedefect correction capabilityVSAvoidcircuitry complexity
Core Design Contradiction:
ReliabilityVSDevice complexity

Solution Approach 1:

The patent extracts the defect map storage function from the volatile memory array and places it in a separate non-volatile memory region. This separation allows the defect correction mechanism to operate independently without adding redundant rows and columns to the main memory array, thereby maintaining reliability while reducing device complexity.

Inventive Principle:
Principle #2Taking out (Extraction)

Solution Approach 2:

The patent performs defect identification and creates a defect map during the manufacturing process before the DRAM is deployed. By pre-identifying defective cells and storing their locations in non-volatile memory, the system eliminates the need for complex runtime defect correction circuitry, as the defect information is already available for bypass operations.

Inventive Principle:
Principle #10Preliminary action

2Reliability

If redundant rows and columns are added to correct defective cells, then reliability is improved, but manufacturing cost increases

Engineering Contradiction:
Improvedefect correction capabilityVSAvoidmanufacturing cost
Core Design Contradiction:
ReliabilityVSEase of manufacture

Solution Approach 1:

The patent extracts the defect map storage function from the volatile memory array and places it in a separate non-volatile memory region. This separation allows the defect correction mechanism to operate independently without adding redundant rows and columns to the main memory array, thereby maintaining reliability while reducing device complexity.

Inventive Principle:
Principle #2Taking out (Extraction)

Solution Approach 2:

The patent performs defect identification and creates a defect map during the manufacturing process before the DRAM is deployed. By pre-identifying defective cells and storing their locations in non-volatile memory, the system eliminates the need for complex runtime defect correction circuitry, as the defect information is already available for bypass operations.

Inventive Principle:
Principle #10Preliminary action

3Reliability

If redundant rows and columns are added to correct defective cells, then defect coverage is improved, but available memory size decreases

Engineering Contradiction:
Improvedefect coverageVSAvoidavailable memory capacity
Core Design Contradiction:
ReliabilityVSQuantity of substance

Solution Approach 1:

The patent extracts the defect map storage function from the volatile memory array and places it in a separate non-volatile memory region. This separation allows the defect correction mechanism to operate independently without adding redundant rows and columns to the main memory array, thereby maintaining reliability while reducing device complexity.

Inventive Principle:
Principle #2Taking out (Extraction)

Solution Approach 2:

The patent performs defect identification and creates a defect map during the manufacturing process before the DRAM is deployed. By pre-identifying defective cells and storing their locations in non-volatile memory, the system eliminates the need for complex runtime defect correction circuitry, as the defect information is already available for bypass operations.

Inventive Principle:
Principle #10Preliminary action

4Reliability

If the number of defective cells exceeds redundant cells available, then defect correction capability is limited, but scrapping is avoided

Engineering Contradiction:
Improvedefect correction limitVSAvoidyield rate
Core Design Contradiction:
ReliabilityVSProductivity

Solution Approach 1:

The patent introduces a defect map as an intermediary data structure that stores the locations of all defective cells. This defect map acts as a mediator between the volatile memory array and the control logic, enabling the system to handle any number of defective cells by providing a comprehensive lookup table for bypass operations, thus eliminating the limitation imposed by the number of redundant cells.

Inventive Principle:
Principle #24Intermediary (Mediator)

Solution Approach 2:

The patent performs defect identification and creates a defect map during the manufacturing process before the DRAM is deployed. By pre-identifying defective cells and storing their locations in non-volatile memory, the system eliminates the need for complex runtime defect correction circuitry, as the defect information is already available for bypass operations.

Inventive Principle:
Principle #10Preliminary action

Data Source

PatentUS9063827B2Systems and methods for storing and retrieving a defect map in a DRAM component
Publication Date: 2015.06.23 DELL PROD LP
  • US9063827B2 patent drawing
  • US9063827B2 patent drawing
  • US9063827B2 patent drawing

AI summary

In accordance with the present disclosure, a dynamic random access memory (DRAM) component is described. The DRAM component may comprise an integrated circuit, with the integrated circuit including an array of volatile memory cells. A first volatile memory cells of the array of volatile memory cells may be defective. The integrated circuit may also include non-volatile memory, and the non-volatile memory may contain a reference to the first volatile memory cell.