DRAM Refresh Management via Segmented Leakage-Based Cycles
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Solution Overview
Problem
As DRAM capacity increases, the existing method of refreshing all memory rows with a single cycle leads to significant performance and energy consumption overheads, affecting energy efficiency.
Innovation Solution
A method and system that determine the refresh cycle for each refresh unit based on data holding time, validity, and criticality, allowing for flexible and optimized refresh operations by storing refresh information in a dedicated space within the DRAM, enabling the use of either Auto Refresh or RAS-Only Refresh strategies based on the number of successive refresh units.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If all memory rows are refreshed using a same cycle, then data in units suffering from severe electric leakage is preserved, but performance overheads and energy consumption overheads increase significantly
Solution Approach 1:
The patent segments the memory rows into multiple groups based on their electric leakage characteristics, with each group having a different refresh cycle. This segmentation allows the system to apply differentiated refresh strategies: rows with severe leakage are refreshed more frequently, while rows with mild leakage are refreshed less frequently, thereby reducing overall performance overhead while maintaining data preservation for critical rows.
Solution Approach 2:
The patent applies local quality by assigning different refresh cycles to different groups of memory rows based on their specific leakage characteristics. Instead of a uniform refresh cycle, each group receives a customized refresh schedule tailored to its local needs, optimizing both data preservation and system performance.
2Reliability
If all memory rows are refreshed using a same cycle, then data in units suffering from severe electric leakage is preserved, but energy consumption overheads increase significantly
Solution Approach 1:
The patent segments memory rows into groups with different refresh cycles based on leakage severity. By refreshing only the necessary groups at their required frequencies, the system significantly reduces energy consumption compared to refreshing all rows at the same high frequency, while still preserving data in rows with severe leakage.
Solution Approach 2:
The patent changes the refresh cycle parameter for different groups of memory rows based on their leakage characteristics. By adjusting this parameter dynamically, the system optimizes energy consumption while maintaining data integrity for rows that require frequent refreshing.
3Quantity of substance
If DRAM capacity increases continuously, then storage capability is improved, but refresh overheads become increasingly large
Solution Approach 1:
The patent segments the large-capacity DRAM into multiple groups based on leakage characteristics, allowing selective refreshing of only the necessary portions. This segmentation approach prevents the need to refresh the entire large capacity at high overhead, as only groups with severe leakage are refreshed frequently while others use longer cycles.
Solution Approach 2:
The patent applies local quality by customizing refresh strategies for different regions of the DRAM based on their specific leakage properties. This allows the system to handle increasing DRAM capacity without proportionally increasing refresh overhead, as each local region receives an optimized refresh schedule.
Data Source
Figure 1~2A
Figure 2B~2C
Figure 2D~3A
AI summary
Embodiments of the present invention provide a method and system for refreshing a dynamic random access memory DRAM, and a device. An address of a refresh unit in a DRAM and refresh information of the refresh unit are acquired, where the refresh unit is storage space on which one time of refresh is performed in the DRAM, and the refresh information of the refresh unit includes a refresh cycle of the refresh unit; and the address of the refresh unit and the refresh information of the refresh unit are encapsulated as a DRAM access request, and the address of the refresh unit and the refresh information of the refresh unit are written into refresh data space by using the DRAM access request, where the refresh data space is storage space that is preset in the DRAM and that is used for storing an address of at least one refresh unit and refresh information of the at least one refresh unit. According to the foregoing solutions, pertinent refreshing can be performed according to refresh information of a refresh unit, so as to resolve a problem of relatively large performance overheads and energy-consumption overheads caused by refresh performed according to a same cycle.