DRAM Row Hammer Test System Evaluating Leakage Charge
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Solution Overview
Problem
Dynamic random access memory (DRAM) systems face challenges in distinguishing logic HIGH and LOW states due to charge dissipation over time, requiring refreshing circuitries and using two bit lines, which complicates the detection of row hammer effects that can lead to abnormal data retrieval.
Innovation Solution
A test system and method that evaluates the row hammer effect by measuring leakage currents and charges caused by AC and DC components of pulses applied to word lines, establishing relationships between voltage levels and leakage charges to facilitate the design of DRAM using EDA tools.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If charge is stored in capacitors to represent logic HIGH and LOW states, then data storage is achieved, but charge dissipation over time occurs requiring refreshing circuitries
Solution Approach 1:
The patent implements periodic refreshing of capacitor charge by applying refresh pulses to word lines at regular intervals. The work station applies a refresh pulse to the first word line, which periodically recharges the capacitors in the first memory row, maintaining the stored logic states without data loss.
Solution Approach 2:
The patent uses leakage current measurement as feedback to detect row hammer effects. The work station measures leakage current from the second memory row and compares it against threshold values to identify when row hammer effects are occurring, enabling corrective action before data corruption occurs.
2Speed
If two bit lines are used for each bit to quickly distinguish logic HIGH and LOW, then detection speed is improved, but device complexity increases
Solution Approach 1:
The patent extracts the row hammer detection function from the normal read operation by using a dedicated test mode. Instead of modifying the standard two-bit-line architecture for detection purposes, the invention uses the existing bit lines but implements a separate test sequence that applies stress patterns and measures leakage currents to detect row hammer effects.
3Reliability
If leakage current measurement is used to evaluate row hammer effects, then detection accuracy is improved, but measurement precision requirements increase
Solution Approach 1:
The patent changes the measurement parameter from direct voltage or charge measurement to leakage current measurement. By measuring the small leakage currents that flow during row hammer events, the system can detect these effects with appropriate precision. The work station measures leakage current from the second memory row and compares it against threshold values to identify row hammer effects.
Solution Approach 2:
The patent uses the bit lines as intermediaries to detect row hammer effects. Instead of directly measuring charge changes in the capacitors, the system measures leakage currents flowing through the bit lines, which serve as mediators that translate the internal capacitor state changes into measurable external signals.
Data Source
AI summary
The present disclosure provides a test system, and a method of operating the same. The test system is for testing a DRAM (dynamic random access memory). The DRAM includes an array including a first memory row and a second memory row. The first memory row includes a first word line. The second memory row includes a second word line and a test cell. The second word line is immediately adjacent to the first word line. The test cell is controllable by the second word line. The test system includes a work station. The work station is configured to evaluate a row hammer effect on the second memory row based on a leakage charge, caused by an AC component of a pulse applied to the first word line, from the test cell.


