DRAM Cell Retention Modulation via Gate Dielectric Charge Trapping
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Solution Overview
Problem
Current non-volatile embedded memories, such as electrically programmable fuses (eFuses), face challenges in advanced semiconductor devices due to increased complexity and scaling issues, particularly in gate-last fin field effect transistor (FINFET) technology, and are limited to one-time programmability.
Innovation Solution
A semiconductor circuit with memory cells that can be programmed into short or long retention time modes by modulating the threshold voltage through charge trapping in the gate dielectric of access transistors, allowing for reversible changes in retention time and multi-time programmability.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If eFuse based on electromigration of metal silicide is used for non-volatile embedded memory, then one-time programmability is achieved, but device complexity increases and scaling becomes difficult in advanced semiconductor devices
Solution Approach 1:
The patent changes the retention time parameter of DRAM cells by modulating the threshold voltage of access transistors through charge trapping in the gate dielectric. This allows the same physical structure to exhibit different retention characteristics (short or long) based on the trapped charge state, eliminating the need for complex eFuse structures while achieving non-volatile functionality.
Solution Approach 2:
The patent enables DRAM cells to serve dual functions: conventional volatile memory operation with short retention time and non-volatile memory operation with long retention time. The access transistor's threshold voltage can be dynamically adjusted to switch between these modes, making a single cell structure universally applicable for both memory types without requiring separate eFuse circuits.
2Reliability
If eFuse is used for non-volatile memory, then one-time programmability is provided, but multi-time programmability and reversibility are lost
Solution Approach 1:
The patent introduces dynamic programmability by enabling reversible charge trapping and de-trapping in the gate dielectric. The threshold voltage of access transistors can be continuously adjusted by controlling the amount of trapped charge, allowing multiple programming cycles and flexible switching between short and long retention time modes, unlike the static one-time programming of eFuses.
Solution Approach 2:
The patent enables recovery of the original state by de-trapping charges from the gate dielectric. This allows programmed cells to be reset and re-programmed multiple times, providing multi-time programmability and reversibility that are fundamentally impossible with one-time programmable eFuses.
3Duration of action of stationary object
If threshold voltage modulation by charge trapping is used to program memory cells, then retention time can be extended beyond volatile memory limits, but process complexity may increase
Solution Approach 1:
The gate dielectric structure inherently provides charge trapping capability as part of its normal operation. The existing dielectric layers serve dual purposes: electrical insulation and charge storage. This self-service approach extends retention time without requiring additional dedicated trapping structures or complex programming mechanisms beyond standard DRAM circuitry.
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
Enables reliable and flexible data storage with programmable retention times, enhancing the functionality of dynamic random access memory (DRAM) cells and allowing for multiple read and write operations, suitable for both conventional DRAM and non-volatile memory applications.
Implementation Method 1
threshold voltage modulation by charge trapping in the gate dielectric of an access transistor of a dynamic random access memory (DRAM) cell
Data Source
AI summary
A mechanism that provides a source of reliability concern is leveraged to establish a non-volatile memory element. A memory cell may be programmed to have a longer retention time or a shorter retention time. Such mechanisms include, but are not limited to, threshold voltage modulation by charge trapping in the gate dielectric of an access transistor of a dynamic random access memory (DRAM) cell. A memory cell is programmed with a voltage pulse into a long retention time mode or into a short retention time mode. The programmed mode of each memory cell may be read by storing electrical charges in the DRAM cells, and by measuring whether the electrical charges remain after a threshold retention time. Further, a dual mode memory cell may be operated as a conventional DRAM cell, or as a non-volatile memory storing retention time as data.