DRAM Self-Refresh Control Circuit for Peak Current Distribution

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Solution Overview

Problem

The self-refresh operation in DRAM devices leads to high-peak current consumption, which can exceed the allowed external voltage limits, causing instability in the refresh operation, especially in DDR3 and DDR4 devices supplied with low external voltages.

Innovation Solution

A self-refresh control circuit that generates a code by counting periods of a periodic wave based on a self-refresh signal, activating bank active signals at different code values to distribute current consumption, and an address generator that changes the row address after the bank active signals are activated, preventing overlapping activations and reducing peak current.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Speed

If self-refresh operation is performed by simultaneously activating all banks, then refresh operation speed is improved, but peak current consumption increases excessively

Engineering Contradiction:
Improverefresh operation speedVSAvoidpeak current consumption
Core Design Contradiction:
SpeedVSUse of energy by moving object

Solution Approach 1:

The refresh operation is segmented into multiple phases by dividing banks into different groups. Instead of activating all banks simultaneously, the control circuit activates banks in sequential groups during different time periods within the refresh cycle, thereby distributing the peak current consumption while maintaining overall refresh effectiveness

Inventive Principle:
Principle #1Segmentation

Solution Approach 2:

The self-refresh control circuit implements periodic activation of bank groups with different duty cycles. By using a periodic wave signal with specific duty cycle (e.g., 50%) to control bank activation, the system achieves regular refresh intervals while limiting instantaneous current draw through controlled on/off timing of different bank groups

Inventive Principle:
Principle #19Periodic action

2Use of energy by stationary object

If external voltage is reduced to meet power requirements, then power consumption is reduced, but refresh operation stability deteriorates

Engineering Contradiction:
Improvepower consumptionVSAvoidrefresh operation stability
Core Design Contradiction:
Use of energy by stationary objectVSReliability

Solution Approach 1:

By segmenting the bank activation into groups with staggered timing, the system reduces peak current demands, allowing the use of lower external voltages without compromising refresh operation stability. The segmented approach ensures that no single bank group draws excessive current that would require higher voltage margins

Inventive Principle:
Principle #1Segmentation

3Quantity of substance

If all banks are activated simultaneously for refresh, then refresh coverage is improved, but current distribution becomes unbalanced

Engineering Contradiction:
Improverefresh coverageVSAvoidcurrent distribution
Core Design Contradiction:
Quantity of substanceVSUse of energy by moving object

Solution Approach 1:

Banks are segmented into multiple groups that are activated at different time intervals. This segmentation maintains comprehensive refresh coverage across all banks while distributing current consumption evenly over time, preventing any single bank group from creating current imbalance or excessive peak demand

Inventive Principle:
Principle #1Segmentation

Solution Approach 2:

Different bank groups are activated periodically with controlled duty cycles. This periodic activation pattern ensures that all banks receive refresh operations (maintaining coverage) while the temporal distribution of activation prevents current concentration, achieving balanced current distribution across the memory system

Inventive Principle:
Principle #19Periodic action

Data Source

PatentUS8395957B2Circuit and method for controlling self-refresh operation in semiconductor memory device
Publication Date: 2013.03.12 SK HYNIX INC
  • US8395957B2 patent drawing
  • US8395957B2 patent drawing
  • US8395957B2 patent drawing

AI summary

A self-refresh control circuit includes: a code generator configured to generate a code by counting periods of a periodic wave based on a self-refresh signal and reset when a code value of the generated code reaches a first value; a bank active signal generator configured to generate a plurality of bank active signals activated in response to different code values of the generated code, respectively, by decoding the generated code; and an address generator configured to change a row address after the plurality of the bank active signals are each activated after the reset of the code generator.