DRAM Superblock Architecture for Simultaneous Read Write in Image Sensors
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Solution Overview
Problem
Bond-per-pixel-block stacked-wafer image sensors face challenges in efficiently processing and storing large amounts of raw image data, particularly in capturing bursts of images, as existing memory solutions struggle to handle the high data volume and sequential reading of pixel blocks.
Innovation Solution
The image sensor design incorporates multiple dynamic RAM (DRAM) superblocks with tristate outputs and address multiplexors, allowing simultaneous writing and reading of data, enabling efficient storage and processing of image frames by overlapping the writing of new frames with the reading of previous frames, and utilizing an alignment buffer for optimal image processing.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Productivity
If sequential reading through ADC into image RAM is used, then device complexity is reduced, but productivity decreases due to inability to simultaneously read and write image data
Solution Approach 1:
The image RAM is segmented into multiple independent banks (first bank, second bank, etc.), each capable of independent read and write operations. This segmentation allows parallel access to different portions of the memory, enabling simultaneous read and write operations without conflict, thus resolving the contradiction between productivity and device complexity.
Solution Approach 2:
The patent introduces a temporal dimension to memory access by enabling overlapping read and write operations in different memory banks. Instead of sequential single-dimensional access, the system utilizes multi-dimensional parallel access paths, allowing data to be read from one bank while simultaneously being written to another bank, thereby improving throughput without proportionally increasing complexity.
2Reliability
If larger image RAM capacity is used to store burst images, then reliability of image capture is improved, but device complexity and cost increase
Solution Approach 1:
The large-capacity image RAM is divided into multiple smaller banks, each capable of storing a portion of the image burst data. This segmentation allows the system to achieve the required total storage capacity while maintaining manageable complexity through modular architecture, where each bank can be independently managed and accessed.
Solution Approach 2:
The multi-bank architecture enables continuous operation by allowing read operations to proceed continuously from one bank while write operations simultaneously fill another bank. This continuity eliminates idle time and ensures reliable capture of image bursts without requiring excessively large single-block memory, thereby controlling complexity while maintaining reliability.
3Measurement precision
If wider data bus from ADCs is used, then measurement precision of pixel data is improved, but device complexity increases due to mismatch with image RAM output bus width
Solution Approach 1:
The data bus interface is segmented into multiple parallel paths, each handling a portion of the high-precision pixel data from the ADCs. By dividing the wide data bus into multiple narrower channels that can be simultaneously processed by different memory banks, the system maintains high measurement precision while reducing the complexity of any single interface path.
Data Source
AI summary
A bond-per-pixel-block image sensor has a pixel array including multiple pixel blocks with selection circuitry to couple signals to an ADC. The image sensor has an image RAM of DRAM superblocks, each superblock with multiple DRAM blocks each having tristate output driving an image RAM output bus, and data input from several of the ADCs. Each DRAM block has an address multiplexor coupled to read and write addresses. DRAM blocks of each superblock are written simultaneously with data wider than a width of the image RAM output bus. A method of capturing and processing images includes reading a first image frame from pixels of a pixel block through ADCs; writing digital pixel data for the first image frame in a first DRAM superblock; and reading pixel data into an alignment buffer. The method includes overlapping reading the first image frame with writing a second image frame into a second superblock.