Drain Connector Curvature for Uniform Chip Bonding

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Solution Overview

Problem

Existing semiconductor devices face challenges in connecting semiconductor chips with uneven bonding material thickness, susceptibility to stress and warping, and void formation during vacuum-reflow heat treatment, which affects thermal resistance and reliability.

Innovation Solution

The semiconductor device employs a drain connector with a thinner first plate portion and a slope on its upper surface to stabilize the semiconductor chip, using bonding materials with controlled thickness and void management to ensure uniform bonding and reduce thermal resistance.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Reliability

If a conventional connector structure is used to connect the semiconductor chip, then the chip can be mounted, but the bonding material thickness becomes uneven and voids form during vacuum-reflow heat treatment

Engineering Contradiction:
Improveconnection reliabilityVSAvoidbonding material thickness uniformity
Core Design Contradiction:
ReliabilityVSManufacturing precision

Solution Approach 1:

The connector upper surface is designed with a specific curvature radius (R1) in the planar direction and (R2) in the thickness direction, creating a curved surface that adapts to the semiconductor chip shape. This curvature ensures uniform bonding material thickness distribution during mounting, preventing void formation while maintaining connection reliability.

Inventive Principle:
Principle #14Spheroidality (Curvature)

Solution Approach 2:

The invention changes the geometric parameters of the connector surface by defining specific curvature radii (R1 and R2) and surface inclination angles (α and β). These parameter adjustments transform the flat connector surface into a curved adaptive surface that maintains uniform bonding material thickness, resolving the contradiction between connection reliability and manufacturing precision.

Inventive Principle:
Principle #35Parameter changes

2Ease of manufacture

If the semiconductor chip is mounted on a flat connector surface, then mounting is simple, but stress concentrates and warping occurs

Engineering Contradiction:
Improvemounting simplicityVSAvoidchip stability
Core Design Contradiction:
Ease of manufactureVSStability of the object's composition

Solution Approach 1:

The curved surface design with specific radii (R1, R2) and inclination angles (α, β) distributes mechanical stress uniformly across the chip-connector interface. This curvature adaptation prevents stress concentration points that would cause warping, while maintaining ease of manufacture through a standardized curved surface geometry.

Inventive Principle:
Principle #14Spheroidality (Curvature)

Solution Approach 2:

The connector surface is designed with different curvature characteristics in different directions (R1 in planar direction, R2 in thickness direction) and controlled inclination angles (α, β). This local quality variation optimizes stress distribution specifically at the chip-connector interface, enhancing chip stability without complicating the manufacturing process.

Inventive Principle:
Principle #3Local quality

3Reliability

If bonding material is applied to achieve chip connection, then electrical connection is established, but thermal resistance increases due to void formation

Engineering Contradiction:
Improveelectrical connectionVSAvoidthermal resistance
Core Design Contradiction:
ReliabilityVSLoss of energy

Solution Approach 1:

The curved connector surface with optimized radii (R1, R2) and inclination angles (α, β) ensures complete and uniform bonding material coverage across the chip interface. This geometric design eliminates void formation in the bonding material, reducing thermal resistance while maintaining reliable electrical connection.

Inventive Principle:
Principle #14Spheroidality (Curvature)

Data Source

PatentUS12469816B2Semiconductor device
Publication Date: 2025.11.11 KK TOSHIBA
  • US12469816B2 patent drawing
  • US12469816B2 patent drawing
  • US12469816B2 patent drawing

AI summary

A semiconductor device includes: a first connector including a first plate having a first upper surface and a first terminal connected to the first plate, a first plate including a second plate and a third plate, a plate thickness of the second plate being thinner than a plate thickness of the third plate, the third plate being provided between the second plate and the first terminal; a semiconductor chip provided on the first upper surface; a first bonding material provided between the first upper surface and the semiconductor chip; a second connector provided on the semiconductor chip, a third connector, the first plate being provided between the first terminal and the third connector; a second bonding material provided between the second connector and the semiconductor chip; and a third bonding material provided between the second connector and the third connector.