Drain-Extended High-Voltage Switches for Safe Terminal Voltage Control
Find Innovative SolutionsGenerate Solutions
Solution Overview
Problem
Semiconductor devices with small process technologies face reliability issues due to the inability to handle high-voltage inputs and outputs, leading to potential damage and unreliability of components when voltages exceed the maximum supported levels.
Innovation Solution
A switch design utilizing pairs of n-type and p-type drain-extended transistors that can withstand high voltages across the drain boundary, coupled with control mechanisms to manage voltage levels within safe limits for the process technology, ensuring no damaging voltages are applied to non-drain extended transistors.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Power
If high-voltage inputs and outputs are applied to semiconductor devices with small process technologies, then the device can handle higher voltage levels, but reliability problems and component damage occur
Solution Approach 1:
The transistor is divided into two distinct regions: a drain-extended region capable of withstanding high voltages and a non-drain-extended region optimized for low-voltage operation. This segmentation allows different parts of the same transistor to handle different voltage levels, enabling the device to process high-voltage signals while protecting sensitive low-voltage components.
Solution Approach 2:
The patent applies different structural characteristics to different regions of the transistor. The drain-extended region has modified doping and geometry to withstand high electric fields, while the non-drain-extended region maintains standard characteristics for low-voltage operation. This local differentiation of properties allows the transistor to simultaneously handle both high and low voltage requirements.
2Power
If high voltages are applied to non-drain extended transistor terminals, then voltage handling increases, but damaging voltages are applied causing reliability issues
Solution Approach 1:
The drain-extended region acts as an intermediary protective element between the high-voltage external signals and the sensitive non-drain-extended region. It absorbs and dissipates the high electric field stress, preventing it from reaching and damaging the gate oxide and other sensitive components in the non-drain-extended region.
Solution Approach 2:
The transistor structure is pre-configured with a drain-extended region that provides built-in protection against high-voltage damage before the damage can occur. This structural cushioning is designed in advance to handle voltage spikes and high-voltage conditions that might otherwise damage the device.
3Power
If drain-extended transistors are used to handle high voltages, then voltage handling capability improves, but device complexity increases
Solution Approach 1:
The patent combines multiple functions into a single transistor structure: high-voltage handling, low-voltage operation, and protection functionality are all integrated into one device. This merging eliminates the need for separate transistors for different voltage levels, reducing overall circuit complexity despite the increased complexity of the individual transistor structure.
Data Source
Figure 1
Figure 2
Figure 3
AI summary
In some examples, a switch comprises first and second drain-extended transistors of a first type, third and fourth drain-extended transistors of a second type, a switch input coupled between drains of the first and third drain-extended transistors, a switch output coupled between drains of the second and fourth drain-extended transistors, and a control input. The control input is coupled to gates of the first and second drain-extended transistors, a first switch coupled to sources of the first and second drain-extended transistors, a second switch coupled between a voltage supply and gates of the third and fourth drain-extended transistors, and a third switch coupled between the voltage supply and sources of the third and fourth drain-extended transistors. The control input comprises a fifth drain-extended transistor coupled between the sources of the third and fourth drain-extended transistors and the gates of the third and fourth drain-extended transistors.