DRAM Bit Line Contact Layout to Eliminate Residual Active Regions

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Solution Overview

Problem

The development of DRAM devices faces issues with parasitic capacitance and short circuits due to residual active regions around bit line contacts, which affect the reliability of the memory device.

Innovation Solution

A bit line contact structure is formed using a free-form lens array in the lithography process, allowing the initial bit line contact structure to be closer to the active region and completely cover it, thereby avoiding residual active region portions that could cause parasitic capacitance and short circuits.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Manufacturing precision

If the bit line contact is changed from a strip structure to a plurality of column structures, then the manufacturing precision is improved, but residual active region remains around the column bit line contact causing parasitic capacitance and short circuit problems

Engineering Contradiction:
Improvebit line contact structure precisionVSAvoiddevice reliability
Core Design Contradiction:
Manufacturing precisionVSReliability

Solution Approach 1:

The patent applies preliminary action by forming an isolation structure around the bit line contact structure before completing the active region formation. This preliminary isolation structure prevents residual active region from forming around the bit line contact, thereby eliminating parasitic capacitance and short circuit risks before they can occur.

Inventive Principle:
Principle #10Preliminary action

Solution Approach 2:

The patent extracts the problematic residual active region by introducing an isolation structure that specifically targets and isolates the area around the bit line contact. This extraction approach removes the source of parasitic capacitance and potential short circuits while maintaining the benefits of the columnar bit line contact structure.

Inventive Principle:
Principle #2Taking out (Extraction)

2Area of moving object

If the bit line contact structure is positioned closer to the active region, then the area of the memory cell is reduced, but residual active region may cause parasitic capacitance and short circuits

Engineering Contradiction:
Improvememory cell areaVSAvoiddevice reliability
Core Design Contradiction:
Area of moving objectVSReliability

Solution Approach 1:

The isolation structure is formed in advance around the bit line contact structure, enabling the bit line contact to be positioned closer to the active region without risk. This preliminary protective measure allows aggressive area reduction while maintaining reliability.

Inventive Principle:
Principle #10Preliminary action

Solution Approach 2:

The isolation structure acts as an intermediary element between the bit line contact structure and the active region. It enables close positioning for area reduction while simultaneously preventing electrical interaction that would cause parasitic capacitance or short circuits.

Inventive Principle:
Principle #24Intermediary (Mediator)

3Manufacturing precision

If the initial bit line contact structure is formed with a specific orientation, then the active region can be completely covered, but the lithography process complexity increases

Engineering Contradiction:
Improveactive region coverage precisionVSAvoidlithography process complexity
Core Design Contradiction:
Manufacturing precisionVSDevice complexity

Solution Approach 1:

The patent employs asymmetric orientation of the initial bit line contact structure, aligning it at a specific angle (e.g., 45 degrees) relative to the active region. This asymmetric positioning enables complete coverage of the active region while the resulting shape can be efficiently formed using standard lithography techniques with free-form lens arrays.

Inventive Principle:
Principle #4Asymmetry

Applied Scientific Principles

This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.

Function Achieved in This Case

This approach enhances the reliability of the DRAM device by preventing parasitic capacitance and short circuits, improving the manufacturing process and reducing the area of the memory cell, thus increasing storage density.

Implementation Method 1

The lithography process used to form the initial bit line contact structure includes the use of a free-form lens array to allow a light pass through the free-form lens array before the light is incident on the photomask

Methodology Applied
Scientific EffectRefraction: Refraction

Data Source

PatentUS11854972B2Memory device
Publication Date: 2023.12.26 WINBOND ELECTRONICS CORP
  • US11854972B2 patent drawing
  • US11854972B2 patent drawing
  • US11854972B2 patent drawing

AI summary

A memory device includes a word line, a bit line, an active region and a bit line contact structure. The word line is disposed in the substrate, and extends along a first direction. The bit line is disposed over the substrate, and extends along a second direction. The active region is disposed in the substrate, and extends along a third direction. The bit line contact structure is disposed between the active region and the bit line. A top view pattern of the bit line contact structure has a long axis. An angle between the extending direction of this long axis and the third direction is less than an angle between the extending direction of this long axis and the first direction, and is less than an angle between the extending direction of this long axis and the second direction.