DRAM Capacitor Bottom Isolation Structure for Leakage Reduction
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Solution Overview
Problem
Existing DRAMs suffer from electric leakage at the bottom of the capacitor, which degrades their performance.
Innovation Solution
A memory forming method that involves etching a substrate to create capacitor holes and recesses, forming an isolation layer to connect and fill the recesses, and using the remaining substrate as a base, followed by constructing a capacitor in the hole, thereby isolating the capacitor's bottom from the substrate.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If a capacitor is formed directly on the substrate in existing DRAM structures, then the manufacturing process is simpler, but electric leakage occurs at the bottom of the capacitor reducing memory performance
Solution Approach 1:
The substrate area is segmented into capacitor holes and recesses through selective etching. The isolation layer is formed to separate adjacent capacitors and fill the recesses, creating distinct isolated regions for each capacitor bottom, thereby preventing electric leakage between adjacent capacitors while maintaining structural organization
Solution Approach 2:
An isolation layer is introduced as an intermediary structure between the substrate and capacitor bottoms. This isolation layer acts as a mediator that electrically isolates the capacitor bottoms from the substrate and from each other, preventing electric leakage without requiring complete substrate removal or complex three-dimensional structures
2Reliability
If an isolation layer is formed to fill recesses and connect adjacent recesses, then electric leakage is reduced, but the manufacturing process becomes more complex
Solution Approach 1:
The formation of the isolation layer is merged with the capacitor hole formation process. The same etching process that creates capacitor holes also creates connected recesses, and the isolation layer is deposited to simultaneously fill these recesses and form isolation structures, reducing the number of separate manufacturing steps
Solution Approach 2:
The recesses are pre-formed during the capacitor hole etching process before the isolation layer is deposited. This preliminary action of creating the recess structure during the existing etching process eliminates the need for separate recess formation steps, making the subsequent isolation layer formation more straightforward
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
This method reduces and prevents electric leakage at the capacitor's bottom, enhancing the memory's electrical properties and simplifying the manufacturing process by integrating capacitor hole and isolation layer formation.
Implementation Method 1
etching the initial substrate to form a plurality of capacitor holes and a plurality of recesses
Data Source
AI summary
The present disclosure relates to a memory and a memory forming method. The memory forming method includes: providing an initial substrate; etching the initial substrate to form a plurality of capacitor holes and a plurality of recesses that are connected to the capacitor holes in a one-to-one corresponding manner and located below the capacitor holes; forming an isolation layer that connects adjacent ones of the recesses and fills up the recesses, and using the initial substrate remaining below the isolation layer as a substrate; and forming a capacitor in the capacitor hole.