DRAM Capacitor Groove Isolation Using High-K Sidewall Dielectrics
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Solution Overview
Problem
The increasing depth-to-width ratio of capacitor holes in dynamic random-access memory (DRAM) units makes it difficult to control the shape of the capacitor holes, leading to defects and reduced yield due to short circuits between adjacent electrodes.
Innovation Solution
A semiconductor structure and preparation method involving the deposition of a high-K material dielectric layer on the side walls of grooves to isolate adjacent electrodes, preventing short circuits and improving electrode isolation, which includes forming a groove on a substrate, depositing a first dielectric layer on the side wall, and subsequently forming electrodes on the dielectric layers.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Duration of action of stationary object
If the depth-to-width ratio of capacitor holes is increased to improve data retention time, then the capacitance and retention time are improved, but the manufacturing precision deteriorates due to difficulty in controlling the shape of capacitor holes and increased risk of short circuits between adjacent electrodes
Solution Approach 1:
A first dielectric layer is deposited on the side walls of grooves before forming the first electrode. This preliminary dielectric layer prevents short circuits between adjacent electrodes by providing isolation during the electrode formation process, enabling the use of deeper grooves for higher capacitance without compromising manufacturing precision
Solution Approach 2:
The first dielectric layer acts as an intermediary substance between adjacent first electrodes in neighboring grooves. This dielectric barrier prevents direct contact and potential short circuits between electrodes, allowing for better control of electrode shapes and positions while maintaining high depth-to-width ratios of the grooves
2Quantity of substance
If the depth-to-width ratio of capacitor holes is increased to improve capacitance, then the capacitance is improved, but the reliability deteriorates due to short circuits between adjacent electrodes
Solution Approach 1:
The first dielectric layer is formed on the groove side walls before electrode deposition, establishing a preventive barrier against short circuits before the problem can occur. This preliminary isolation structure ensures reliable operation of high-capacitance capacitors with deep grooves
Solution Approach 2:
The first dielectric layer serves as an intermediary isolation layer between adjacent electrodes, preventing harmful electrical contact while allowing the electrodes to be positioned closer together or at greater depths, thereby increasing capacitance without sacrificing reliability
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
The method effectively avoids short circuits between adjacent electrodes, enhancing the yield and reliability of the semiconductor structure by ensuring proper isolation and preventing defects caused by recess regions.
Implementation Method 1
forming a first dielectric layer on a side wall of the groove... improve an electrode isolation effect between the adjacent grooves
Implementation Method 2
a material of the first dielectric layer contains a high-K material... improve an electrode isolation effect between the adjacent grooves
Implementation Method 3
forming an opening for at least exposing part of the sacrificial layer by etching the support layer; forming a space region for exposing an outer surface of the first dielectric layer by etching and removing the sacrificial layer
Implementation Method 4
forming a second dielectric layer on a surface of the first electrode
Data Source
AI summary
A preparation method of a semiconductor structure includes: providing a substrate, and forming a groove on the substrate by etching; forming a first dielectric layer on a side wall of the groove; forming a first electrode on the bottom of the groove and on an inner surface of the first dielectric layer; forming a second dielectric layer on a surface of the first electrode; and forming a second electrode on a surface of the second dielectric layer.