Capacitor Top Electrode Interface Layers for Low-Leakage DRAM Cells
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Solution Overview
Problem
Semiconductor devices face challenges in achieving high operating speed and low voltage while maintaining electrical properties and production yield, as increased integration often reduces these qualities.
Innovation Solution
A semiconductor device design incorporating a capacitor structure with a substrate, capacitor contact structure, bottom electrode, capacitor dielectric layer, and top electrode, where the top electrode includes an interface layer with molybdenum and oxygen, and an electrode layer with titanium and nitrogen, optimizing thickness ratios to enhance capacitance and minimize leakage current and resistivity.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Productivity
If integration of semiconductor device is increased, then device functionality and capacity are improved, but electrical properties and production yield deteriorate
Solution Approach 1:
The patent applies local quality by creating a non-uniform thickness profile in the capacitor dielectric layer, where the thickness varies from a first thickness at a first location to a second thickness at a second location. This localized variation allows optimization of electrical properties in specific regions while maintaining overall device capacity, thereby resolving the contradiction between increased integration and maintained electrical performance
Solution Approach 2:
The patent changes the physical parameter of dielectric layer thickness to resolve the contradiction. By adjusting the thickness parameter spatially across the capacitor structure, the device achieves both high capacity (through increased storage volume) and good electrical properties (through optimized electric field distribution in varying thickness regions)
2Use of energy by moving object
If operating voltage is reduced, then power consumption is lowered, but electrical properties deteriorate
Solution Approach 1:
The patent changes the dielectric layer thickness parameter to enable operation at lower voltages while maintaining electrical properties. The varied thickness profile optimizes capacitance density and electric field distribution, allowing reduced operating voltage without sacrificing performance
3Quantity of substance
If capacitor dielectric layer thickness is increased, then capacitance is increased, but leakage current increases
Solution Approach 1:
The patent applies local quality by implementing spatially varying thickness in the capacitor dielectric layer. Thicker regions provide higher capacitance while thinner regions reduce leakage current paths, thereby achieving both increased capacitance and reduced leakage simultaneously through localized optimization
Data Source
AI summary
Disclosed is a semiconductor device comprising a substrate, a capacitor contact structure electrically connected to the substrate, a bottom electrode connected to the capacitor contact structure, a capacitor dielectric layer on the bottom electrode, and a top electrode on the capacitor dielectric layer. The top electrode includes an interface layer on the capacitor dielectric layer and an electrode layer on the interface layer. The interface layer includes a first layer on the capacitor dielectric layer and a second layer on the first layer. The first layer includes molybdenum and oxygen. The second layer includes molybdenum and nitrogen. The electrode layer includes titanium and nitrogen. A thickness of the interface layer is less than a thickness of the capacitor dielectric layer and a thickness of the electrode layer.