DRAM Capacitor Structure With Seam Sealing to Reduce Leakage

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Solution Overview

Problem

The shrinking size of semiconductor structures in DRAM devices leads to increased leakage and manufacturing difficulties due to close component distances, affecting process yield and resistance values.

Innovation Solution

A method is introduced to form a semiconductor structure with a sealing layer in the seam of the conductive layer, oxidizing and removing excess material to create a bowl-shaped opening, and depositing additional conductive layers to improve adhesion and prevent oxidation, resulting in a capacitor structure without seams.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Quantity of substance

If the pitch between semiconductor structures is shortened to increase integration, then device density is improved, but leakage increases and manufacturing difficulty increases

Engineering Contradiction:
Improvedevice integration densityVSAvoidleakage
Core Design Contradiction:
Quantity of substanceVSReliability

Solution Approach 1:

The conductive layer is segmented into multiple sections with seams between them. The sealing layer is selectively formed at these seam locations to prevent leakage, while the capacitor structures between seams remain isolated. This segmentation approach allows close spacing for high density while maintaining reliability through localized sealing at critical seam points.

Inventive Principle:
Principle #1Segmentation

2Reliability

If the conductive layer is made continuous to improve conductivity, then electrical connection is improved, but seams are formed causing leakage

Engineering Contradiction:
Improveelectrical connectionVSAvoidseam-induced leakage
Core Design Contradiction:
ReliabilityVSObject-generated harmful factors

Solution Approach 1:

The sealing layer acts as an intermediary element between the conductive layer seams and the capacitor structures. It fills and seals the seam regions, preventing leakage while allowing the conductive layer to maintain its continuous structure for electrical connection. The sealing layer mediates between the need for continuity and the harmful effect of seams.

Inventive Principle:
Principle #24Intermediary (Mediator)

3Reliability

If additional layers are deposited to seal seams and prevent oxidation, then reliability is improved, but device complexity increases

Engineering Contradiction:
Improveseam sealing and oxidation preventionVSAvoidnumber of deposition layers
Core Design Contradiction:
ReliabilityVSDevice complexity

Solution Approach 1:

The sealing layer is formed with local quality - it is selectively deposited only at the seam locations and inner sidewalls of capacitor structures, not uniformly across the entire surface. This localized approach provides the necessary sealing and oxidation protection exactly where needed, while minimizing the overall complexity and material usage compared to a complete uniform coating.

Inventive Principle:
Principle #3Local quality

Applied Scientific Principles

This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.

Function Achieved in This Case

This method reduces resistance and prevents oxidation, enhancing the process yield and performance of semiconductor structures by improving the adhesion and coverage of conductive layers.

Implementation Method 1

The sealing layer is oxidized by an asher oxidation process

Methodology Applied
Scientific EffectOxidation: Oxidation

Implementation Method 2

The oxidized sealing layer is removed by a dilute HF clean process

Methodology Applied
Scientific EffectChemical etching:

Data Source

PatentUS20250267946A1Semiconductor structure and method of manufacturing the same
Publication Date: 2025.08.21 NAN YA TECH
  • US20250267946A1 patent drawing
  • US20250267946A1 patent drawing
  • US20250267946A1 patent drawing

AI summary

Embodiments of this disclosure provide a semiconductor structure, including a substrate, a lower electrode layer on the substrate, a first dielectric layer on the lower electrode layer and capacitor structures in the first dielectric layer and the second dielectric layer and each of the plurality of capacitor structures includes a sealing layer in an upper portion of each of the capacitor structures, a first conductive layer surrounding a sidewall and a bottom surface of the sealing layer, a top capacitor plate surrounding a sidewall and a bottom surface of the first conductive layer, an oxide layer surrounding a sidewall and a bottom surface of the top capacitor plate and a bottom capacitor plate on the lower electrode layer and surrounding a sidewall and a bottom surface of the oxide layer. In addition, a method of manufacturing a semiconductor structure is also disclosed in this disclosure.