DRAM Capacitor Opening Holes Using Sequential Side-Wall Masks
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Solution Overview
Problem
Existing semiconductor manufacturing technologies struggle to meet the increasing demands for precision and accuracy in forming capacitor opening holes for memory capacitors in dynamic random access memory (DRAM) due to their miniaturization and higher integration levels.
Innovation Solution
A method involving the formation of multiple hollow first and second side wall structures on a substrate, using these as masks to etch a sacrificial layer and supporting layer, forming a capacitor opening hole, and subsequently constructing a memory capacitor with a first electrode layer, capacitor dielectric layer, and second electrode layer.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Adaptability or versatility
If the size of capacitor opening hole is continuously miniaturized to meet higher integration levels, then the integration level of DRAM is improved, but the manufacturing precision and accuracy of capacitor opening hole formation deteriorate
Solution Approach 1:
The patent divides the single masking step into multiple sequential masking steps using different mask patterns. First, a first mask pattern is formed to define initial opening regions, then a second mask pattern is formed to define capacitor opening hole positions. This segmentation allows each masking step to focus on specific features, improving the precision of capacitor opening hole formation while enabling higher integration levels through systematic pattern definition.
Solution Approach 2:
The patent performs preliminary actions by forming the first mask pattern and first opening regions before forming the second mask pattern and capacitor opening holes. The sacrificial layer is partially removed in advance to create supporting structures that facilitate subsequent precise etching. This preliminary preparation ensures that when capacitor opening holes are formed, the underlying structure is already optimized for high-precision fabrication.
2Ease of manufacture
If existing preparation technologies are used for capacitor opening hole formation, then the process is simpler, but the precision and accuracy cannot meet the rapidly developing requirements for size and precision
Solution Approach 1:
The manufacturing process is segmented into distinct stages: forming first mask pattern and first opening regions, removing sacrificial layer in those regions, forming second mask pattern, and etching capacitor opening holes. This segmentation transforms a complex high-precision process into manageable sequential steps, where each step can be optimized independently, thereby maintaining ease of manufacture while achieving the required precision.
Solution Approach 2:
The patent introduces intermediate structures including the first mask pattern, second mask pattern, and partially removed sacrificial layer that serves as a supporting structure. These intermediaries act as mediators that enable precise capacitor opening hole formation without requiring direct complex patterning. The mask patterns serve as intermediaries that translate design requirements into precise physical structures through controlled etching processes.
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
This method enhances the precision and yield of capacitor opening hole formation, improving the integration level and charge storage capacity of DRAM while maintaining structural stability.
Implementation Method 1
The sacrificial layer and the supporting layer are etched by taking the first side wall structure and the second side wall structure as masks to form the capacitor opening hole
Data Source
AI summary
A method for forming a capacitor opening hole and a method for forming a memory capacitor are provided. The method for forming a capacitor opening hole includes: providing a substrate, and forming a sacrificial layer and a supporting layer, which are stacked, on the surface of the substrate (S100); forming multiple hollow first side wall structures, spaced apart, on the surface of the supporting layer (S200); forming a second material layer on the surface of the first side wall structure to constitute a second side wall structure (S300); and etching the sacrificial layer and the supporting layer by taking the first side wall structure and the second side wall structure as masks to form the capacitor opening hole (S400).


